master: arm64: don't do (ldrsw (32-bit-reg x) ..)

The branch "master" has been updated in SBCL:
       via  467666387e8a978e6580277e241d4011b04d629c (commit)
      from  f1109de3da81a64f388e09eb221f62329afae03d (commit)

- Log -----------------------------------------------------------------
commit 467666387e8a978e6580277e241d4011b04d629c
Author: Stas Boukarev <[email protected]>
Date:   Thu Apr 23 19:39:19 2026 +0300

    arm64: don't do (ldrsw (32-bit-reg x) ..)
    
    It's supposed to sign extend into a 64-bit register.
    The assembler doesn't care, but there's no reason to create
    unnecessary tns.
---
 src/compiler/arm64/c-call.lisp | 2 +-
 src/compiler/arm64/float.lisp  | 6 +++---
 src/compiler/arm64/sap.lisp    | 6 ++++--
 3 files changed, 8 insertions(+), 6 deletions(-)

diff --git a/src/compiler/arm64/c-call.lisp b/src/compiler/arm64/c-call.lisp
index e48022704..6318c56bb 100644
--- a/src/compiler/arm64/c-call.lisp
+++ b/src/compiler/arm64/c-call.lisp
@@ -737,7 +737,7 @@
                                               (inst ldrh temp-tn addr)))
                                          (4
                                           (if signed
-                                              (inst ldrsw (32-bit-reg temp-tn) addr)
+                                              (inst ldrsw temp-tn addr)
                                               (inst ldr (32-bit-reg temp-tn) addr))))))
                                     (t
                                      (inst ldr temp-tn addr)))
diff --git a/src/compiler/arm64/float.lisp b/src/compiler/arm64/float.lisp
index 84f6242ad..acbb7aaa0 100644
--- a/src/compiler/arm64/float.lisp
+++ b/src/compiler/arm64/float.lisp
@@ -764,7 +764,7 @@
           (inst fmov bits float)
           (inst sxtw bits bits))
          (single-stack
-          (inst ldrsw (32-bit-reg bits)
+          (inst ldrsw bits
                 (@ (current-nfp-tn vop)
                    (load-store-offset (ash (tn-offset float) 3)))))
          (descriptor-reg
@@ -814,7 +814,7 @@
        (inst fmov hi-bits float)
        (inst asr hi-bits hi-bits 32))
       (double-stack
-        (inst ldrsw (32-bit-reg hi-bits)
+        (inst ldrsw hi-bits
               (@ (current-nfp-tn vop)
                  (load-store-offset
                   (+ (tn-byte-offset float)
@@ -822,7 +822,7 @@
                          0
                          4))))))
       (descriptor-reg
-       (inst ldrsw (32-bit-reg hi-bits)
+       (inst ldrsw hi-bits
              (@ float
                 (- (+ (* double-float-value-slot n-word-bytes)
                       (if (eq *backend-byte-order* :big-endian)
diff --git a/src/compiler/arm64/sap.lisp b/src/compiler/arm64/sap.lisp
index 816cdb802..d7feed6b0 100644
--- a/src/compiler/arm64/sap.lisp
+++ b/src/compiler/arm64/sap.lisp
@@ -222,7 +222,8 @@
                              (:short (if signed 'ldrsh 'ldrh))
                              (:word (if signed 'ldrsw 'ldr))
                              (t 'ldr))
-                      ,(if (eq size :word)
+                      ,(if (and (eq size :word)
+                                (not signed))
                            '(32-bit-reg result)
                            'result)
                       (@ sap offset))))
@@ -256,7 +257,8 @@
                              (:short (if signed 'ldrsh 'ldrh))
                              (:word (if signed 'ldrsw 'ldr))
                              (t 'ldr))
-                      ,(if (eq size :word)
+                      ,(if (and (eq size :word)
+                                (not signed))
                            '(32-bit-reg result)
                            'result)
                       (@ sap offset))))

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