master: arm64, arch_do_displaced_inst: add SIMD LDR (literal)
stassats via Sbcl-commits <[email protected]> Thu, 21 May 2026 00:04:37 +0000
| Newsgroups | gmane.lisp.steel-bank.cvs |
|---|---|
| Message-ID | <[email protected]> |
The branch "master" has been updated in SBCL:
via 8d1ca5121c8a95baa7747753c2e7245eb8980205 (commit)
from f716ffe01c181bbea195e4a3dc06e50503f5bc39 (commit)
- Log -----------------------------------------------------------------
commit 8d1ca5121c8a95baa7747753c2e7245eb8980205
Author: Stas Boukarev <[email protected]>
Date: Thu May 21 02:52:51 2026 +0300
arm64, arch_do_displaced_inst: add SIMD LDR (literal)
---
src/runtime/arm64-arch.c | 24 +++++++++++++++++++++++-
1 file changed, 23 insertions(+), 1 deletion(-)
diff --git a/src/runtime/arm64-arch.c b/src/runtime/arm64-arch.c
index 97ad75565..a4a60839c 100644
--- a/src/runtime/arm64-arch.c
+++ b/src/runtime/arm64-arch.c
@@ -211,7 +211,7 @@ void arch_do_displaced_inst(os_context_t *context, unsigned int orig_inst)
int opc = (orig_inst >> 30) & 0b11;
int rt = orig_inst & 0b11111;
int offset = sign_extend((orig_inst >> 5) & (1 << 19)-1, 19);
- unsigned int *new_pc = (pc + offset);
+ unsigned int *new_pc = pc + offset;
if (opc == 0b01)
*os_context_register_addr(context, rt) = *((uint64_t *)new_pc);
@@ -222,6 +222,28 @@ void arch_do_displaced_inst(os_context_t *context, unsigned int orig_inst)
next_pc += 1;
}
+ else if (((orig_inst >> 24) & 0b111111) == 0b011100) {
+ // SIMD LDR (literal)
+ int opc = (orig_inst >> 30) & 0b11;
+ int rt = orig_inst & 0b11111;
+ int offset = sign_extend((orig_inst >> 5) & (1 << 19)-1, 19);
+ unsigned int *new_pc = pc + offset;
+
+ if (opc == 0b00) {
+ *os_context_float_register_addr(context, rt) = *((uint32_t *)new_pc);
+ }
+ else if (opc == 0b01) {
+ *os_context_float_register_addr(context, rt) = *((uint64_t *)new_pc);
+ }
+ else if (opc == 0b10) {
+ memcpy(os_context_float_register_addr(context, rt), new_pc, 16);
+ }
+ else {
+ lose("Unsupported SIMD/FP LDR (literal) variant: %x", orig_inst);
+ }
+
+ next_pc += 1;
+ }
else if (((orig_inst >> 24) & 0b11111) == 0b10000) {
// ADR(P)
bool op = (orig_inst >> 31) & 0b1;
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