master: arm64: add neon shl

The branch "master" has been updated in SBCL:
       via  ef6c77184656c89cadfa6d734acc1f51e1951bd7 (commit)
      from  1b5d6e2582a84b0d6a6de89ecb5d9bb2c9c2462d (commit)

- Log -----------------------------------------------------------------
commit ef6c77184656c89cadfa6d734acc1f51e1951bd7
Author: Stas Boukarev <[email protected]>
Date:   Thu Jun 11 04:18:46 2026 +0300

    arm64: add neon shl
---
 src/compiler/arm64/insts.lisp | 11 ++++++++---
 1 file changed, 8 insertions(+), 3 deletions(-)

diff --git a/src/compiler/arm64/insts.lisp b/src/compiler/arm64/insts.lisp
index 08c77d3f5..48965d1cf 100644
--- a/src/compiler/arm64/insts.lisp
+++ b/src/compiler/arm64/insts.lisp
@@ -3343,7 +3343,7 @@
   (def ushll2 #b1 #b1 #b10100))
 
 (macrolet
-    ((def (name u op &optional right)
+    ((def (name u op &optional right 2d)
        `(define-instruction ,name (segment rd rn size shift)
           ;; Conflicts with simd-modified-imm where immh=0
           ,@(loop for (size pos) in '((4 19)
@@ -3382,7 +3382,11 @@
                       q 0))
                (:4s
                 (setf immh #b100
-                      q 1)))
+                      q 1))
+               ,@(when 2d
+                   `((:2d
+                      (setf immh #b1000
+                            q 1)))))
              (setf immh (logior immh (ldb (byte (1- (integer-length immh)) 3) shift))
                    immb (ldb (byte 3 0) shift))
              (emit-simd-shift-by-imm segment
@@ -3395,7 +3399,8 @@
                                      (fpr-offset rd)))))))
   (def sli #b1 #b01010)
   (def sri #b1 #b01000 t)
-  (def ushr #b1 #b00000 t)
+  (def ushr #b1 #b00000 t t)
+  (def s-shl #b0 #b01010 nil t)
   (def shrn #b0 #b10000 t))
 
 (def-emitter simd-modified-imm

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