master: arm64: add uqsub
stassats via Sbcl-commits <[email protected]> Sun, 14 Jun 2026 13:55:21 +0000
| Newsgroups | gmane.lisp.steel-bank.cvs |
|---|---|
| Message-ID | <[email protected]> |
The branch "master" has been updated in SBCL:
via 1c657e05b24f0e4d4f499485eb2c56c2b7e958a7 (commit)
from 9e13318991cdc4425f2b2291934bf5e0192e5d0d (commit)
- Log -----------------------------------------------------------------
commit 1c657e05b24f0e4d4f499485eb2c56c2b7e958a7
Author: Stas Boukarev <[email protected]>
Date: Sun Jun 14 05:54:40 2026 +0300
arm64: add uqsub
---
src/compiler/arm64/insts.lisp | 7 ++++++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/src/compiler/arm64/insts.lisp b/src/compiler/arm64/insts.lisp
index 219ca856b..d60e2a669 100644
--- a/src/compiler/arm64/insts.lisp
+++ b/src/compiler/arm64/insts.lisp
@@ -3101,7 +3101,12 @@
(def umin #b1 #b01101)
(def umax #b1 #b01100)
(def smin #b0 #b01101)
- (def smax #b0 #b01100))
+ (def smax #b0 #b01100)
+ (def uhadd #b1 #b00000)
+ (def uqadd #b1 #b00001)
+ (def urhadd #b1 #b00010)
+ (def uhsub #b1 #b00100)
+ (def uqsub #b1 #b00101))
(macrolet ((def (name u neg op)
`(define-instruction ,name (segment rd rn rm size)
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