master: Optimize sb-thread:barrier for arm64

The branch "master" has been updated in SBCL:
       via  d1eead8b25e5c53defc408f3f294a47340226e79 (commit)
      from  6a3653971d0b0a98b05db75a6b18de6f6c47d507 (commit)

- Log -----------------------------------------------------------------
commit d1eead8b25e5c53defc408f3f294a47340226e79
Author: Sahil Kang <[email protected]>
Date:   Mon Jun 15 04:19:59 2026 -0700

    Optimize sb-thread:barrier for arm64
    
    When using sb-thread:barrier before, a full DMB SY instruction was being
    emitted. This patch updates the :memory, :read, and :write args to emit
    DMB ISH, DMB ISHLD, and DMB ISHST instructions, respectively.
    
    This change still aligns with the sb-thread:barrier docstring.
---
 src/compiler/arm64/system.lisp | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/src/compiler/arm64/system.lisp b/src/compiler/arm64/system.lisp
index 870db558d..45baba15a 100644
--- a/src/compiler/arm64/system.lisp
+++ b/src/compiler/arm64/system.lisp
@@ -285,19 +285,19 @@
   (:policy :fast-safe)
   (:translate %memory-barrier)
   (:generator 3
-    (inst dmb)))
+    (inst dmb :ish)))
 
 (define-vop (%read-barrier)
   (:policy :fast-safe)
   (:translate %read-barrier)
   (:generator 3
-    (inst dmb)))
+    (inst dmb :ishld)))
 
 (define-vop (%write-barrier)
   (:policy :fast-safe)
   (:translate %write-barrier)
   (:generator 3
-    (inst dmb)))
+    (inst dmb :ishst)))
 
 (define-vop (%data-dependency-barrier)
   (:policy :fast-safe)

-----------------------------------------------------------------------


hooks/post-receive
-- 
SBCL