master: Add remark on known bugs
snuglas via Sbcl-commits <[email protected]> Tue, 07 Jul 2026 19:31:10 +0000
| Newsgroups | gmane.lisp.steel-bank.cvs |
|---|---|
| Message-ID | <[email protected]> |
The branch "master" has been updated in SBCL:
via d445661d422ba6537cd378a419dd530e25ddd2a9 (commit)
from 51517b0a81158f938f411ec5e954b58924fb895e (commit)
- Log -----------------------------------------------------------------
commit d445661d422ba6537cd378a419dd530e25ddd2a9
Author: Douglas Katzman <[email protected]>
Date: Tue Jul 7 19:22:53 2026 +0000
Add remark on known bugs
---
src/compiler/arm64/insts.lisp | 11 +++++++++--
1 file changed, 9 insertions(+), 2 deletions(-)
diff --git a/src/compiler/arm64/insts.lisp b/src/compiler/arm64/insts.lisp
index abde88b29..53a86a9e5 100644
--- a/src/compiler/arm64/insts.lisp
+++ b/src/compiler/arm64/insts.lisp
@@ -1643,10 +1643,17 @@
(def-load-store strb 0 #b00)
(def-load-store ldrb 0 #b01)
-(def-load-store ldrsb 0 #b10)
(def-load-store strh 1 #b00)
(def-load-store ldrh 1 #b01)
-(def-load-store ldrsh 1 #b10)
+;; The sign-extending load instructions use 'size' to convey the size
+;; of the data being loaded, and 'opc' to indicate whether the destination
+;; is an X register or W register. So these instructions suffer from two bugs:
+;; 1) Because we've hardwired the opc to #b10 we can only target the
+;; full-sized register, which is typically what we want anyway
+;; 2) because Rt is printed using PRINT-REG-FLOAT-REG it incorrectly
+;; interprets the size field as the W register size
+(def-load-store ldrsb #b00 #b10)
+(def-load-store ldrsh #b01 #b10)
(def-load-store ldrsw #b10 #b10)
(def-load-store str nil #b00
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