master: Replace two instructions with one

stassats via Sbcl-commits <[email protected]>
Newsgroups gmane.lisp.steel-bank.cvs
Message-ID <[email protected]>
The branch "master" has been updated in SBCL:
       via  0a1f43ff5d5fbc95ad8aa41ac02b4d157b9e3413 (commit)
      from  7f3f7b8ef3e03fde909915e516582dff710ad792 (commit)

- Log -----------------------------------------------------------------
commit 0a1f43ff5d5fbc95ad8aa41ac02b4d157b9e3413
Author: Stas Boukarev <[email protected]>
Date:   Mon Aug 17 07:13:53 2026 +0300

    Replace two instructions with one
---
 src/code/arm64-simd.lisp      |  4 +--
 src/compiler/arm64/insts.lisp | 76 +++++++++++++++++++++++++++----------------
 src/compiler/disassem.lisp    | 11 +++++--
 xperfecthash63.lisp-expr      |  6 ++++
 4 files changed, 64 insertions(+), 33 deletions(-)

diff --git a/src/code/arm64-simd.lisp b/src/code/arm64-simd.lisp
index f11aaa595..e62ffa500 100644
--- a/src/code/arm64-simd.lisp
+++ b/src/code/arm64-simd.lisp
@@ -2449,8 +2449,8 @@
             TAIL-16
             (inst cmp tmp-tn 8)
             (inst b :lt DONE)
-            (inst movi temp #xFFFFFFFF)
-            (inst and continuations continuations temp :8b)
+            ;; Clear the upper bits
+            (inst shl continuations continuations 32 :d)
             (inst addv count continuations :8b)
             (inst smov tmp-tn count 0 :b)
             (inst str s1 (@ ptr))
diff --git a/src/compiler/arm64/insts.lisp b/src/compiler/arm64/insts.lisp
index aac72a3ec..e481e34d2 100644
--- a/src/compiler/arm64/insts.lisp
+++ b/src/compiler/arm64/insts.lisp
@@ -564,13 +564,11 @@
      (:printer simd-three-same-scalar-d ((u ,simd-u) (op ,simd-op)))
      (:emitter
       (if vector-size
-          (multiple-value-bind (q size) (encode-vector-size/scalar vector-size)
+          (multiple-value-bind (q size scalar) (encode-vector-size/scalar vector-size)
             (emit-simd-three-same segment
                                   q
                                   ,simd-u
-                                  (case vector-size
-                                    (:d 1)
-                                    (t 0))
+                                  scalar
                                   size
                                   (fpr-offset rm)
                                   ,simd-op
@@ -643,13 +641,11 @@
   (:printer simd-two-misc-scalar-d ((u 1) (op #b01011)))
   (:emitter
    (if vector-size
-       (multiple-value-bind (q size) (encode-vector-size/scalar vector-size)
+       (multiple-value-bind (q size scalar) (encode-vector-size/scalar vector-size)
          (emit-simd-two-misc segment
                                q
                                1
-                               (case vector-size
-                                 (:d 1)
-                                 (t 0))
+                               scalar
                                size
                                #b01011
                                (fpr-offset rm)
@@ -3499,6 +3495,7 @@
 (define-instruction-format (simd-three-same-scalar-d 32
                             :include simd-three-same
                             :default-printer '(:name :tab rd ", " rn ", " rm))
+  (q :field (byte 1 30) :value #b1)
   (op4 :field (byte 5 24) :value #b11110)
   (rm :field (byte 5 16) :type 'simd-reg-d)
   (rn :field (byte 5 5) :type 'simd-reg-d)
@@ -3545,15 +3542,15 @@
 
 (defun encode-vector-size/scalar (size)
   (ecase size
-    (:8b (values 0 0))
-    (:16b (values 1 0))
-    (:4h (values 0 #b01))
-    (:8h (values 1 #b01))
-    (:2s (values 0 #b10))
-    (:4s (values 1 #b10))
-    (:1d (values 0 #b11))
-    (:2d (values 1 #b11))
-    (:d (values 1 #b11))))
+    (:8b (values 0 0 0))
+    (:16b (values 1 0 0))
+    (:4h (values 0 #b01 0))
+    (:8h (values 1 #b01 0))
+    (:2s (values 0 #b10 0))
+    (:4s (values 1 #b10 0))
+    (:1d (values 0 #b11 0))
+    (:2d (values 1 #b11 0))
+    (:d (values 1 #b11 1))))
 
 (defun encode-vector-float-size (size)
   (ecase size
@@ -4114,6 +4111,7 @@
 
 (define-instruction-format (simd-two-misc-scalar-d 32
                             :include simd-two-misc)
+  (q :field (byte 1 30) :value 1)
   (op2 :field (byte 5 24) :value #b11110)
   (rn :field (byte 5 5) :type 'simd-reg-d)
   (rd :field (byte 5 0) :type 'simd-reg-d))
@@ -4201,7 +4199,8 @@
   (#b0 1 31)
   (q 1 30)
   (u 1 29)
-  (#b011110 6 23)
+  (scalar 1 28)
+  (#b11110 5 23)
   (immh 4 19)
   (immb 3 16)
   (op 5 11)
@@ -4221,6 +4220,13 @@
   (rn :fields (list (byte 1 30) (byte 4 19) (byte 5 5)) :type 'simd-immh-reg)
   (rd :fields (list (byte 4 19) (byte 5 0)) :type 'simd-immh-reg))
 
+(define-instruction-format (simd-shift-by-imm-scalar-d 32
+                            :include simd-shift-by-imm)
+  (q :field (byte 1 30) :value 1)
+  (op2 :field (byte 6 23) :value #b111110)
+  (rn :field (byte 5 5) :type 'simd-reg-d)
+  (rd :field (byte 5 0) :type 'simd-reg-d))
+
 (macrolet
     ((def (name q u op)
        `(define-instruction ,name (segment rd sized rn sizen &optional (shift 0))
@@ -4261,6 +4267,7 @@
              (emit-simd-shift-by-imm segment
                                      ,q
                                      ,u
+                                     0
                                      immh
                                      immb
                                      ,op
@@ -4279,26 +4286,34 @@
                                       (3 20)
                                       (2 21)
                                       (1 22))
-                  collect
-                  `(:printer simd-shift-by-imm ((u ,u) (op ,op)
-                                                       ,@(and q `((q ,q)))
-                                                (immh #b1 :field (byte ,size ,pos))
-                                                ,@(if right
-                                                      `((shift nil :type 'simd-immh-shift-right)))
-                                                (rd nil :fields (list (byte 1 30) (byte 4 19) (byte 5 0))
-                                                        :type 'simd-immh-reg))))
+                  append
+                  `((:printer simd-shift-by-imm
+                              ((u ,u) (op ,op)
+                                      ,@(and q `((q ,q)))
+                                      (immh #b1 :field (byte ,size ,pos))
+                                      ,@(if right
+                                            `((shift nil :type 'simd-immh-shift-right)))
+                                      (rd nil :fields (list (byte 1 30) (byte 4 19) (byte 5 0))
+                                              :type 'simd-immh-reg)))
+                    ,@(unless q
+                        `((:printer simd-shift-by-imm-scalar-d
+                                    ((u ,u) (op ,op)
+                                            (immh #b1 :field (byte ,size ,pos))
+                                            ,@(if right
+                                                  `((shift nil :type 'simd-immh-shift-right)))))))))
           (:emitter
            (let ((immh 0)
                  (immb 0)
                  (q 0)
                  (shift ,(if right
                              `(ldb (byte 6 0) (- shift))
-                             `shift)))
+                             `shift))
+                 (scalar 0))
              (ecase size
                ,@(remove-if (lambda (x)
                               (member (car x)
                                       (case q
-                                        (1 '(:8b :4h :2s))
+                                        (1 '(:8b :4h :2s :d))
                                         (0 '(:16b :8h :4s :2d)))))
                   `((:8b
                      (setf immh #b1
@@ -4318,6 +4333,10 @@
                     (:4s
                      (setf immh #b100
                            q 1))
+                    (:d
+                     (setf immh #b1000
+                           q 1
+                           scalar 1))
                     ,@(when 2d
                         `((:2d
                            (setf immh #b1000
@@ -4327,6 +4346,7 @@
              (emit-simd-shift-by-imm segment
                                      q
                                      ,u
+                                     scalar
                                      immh
                                      immb
                                      ,op
diff --git a/src/compiler/disassem.lisp b/src/compiler/disassem.lisp
index 28337d548..31bc2dfcc 100644
--- a/src/compiler/disassem.lisp
+++ b/src/compiler/disassem.lisp
@@ -339,8 +339,9 @@
 
 (defun %def-inst-format (name inherit length printer &rest arg-specs)
   (declare (inline make-inst-format))
-  (let ((args (if inherit (copy-list (format-args (format-or-lose inherit)))))
-        (seen))
+  (let* ((inherit (and inherit (format-or-lose inherit)))
+         (args (and inherit (copy-list (format-args inherit))))
+         (seen))
     (dolist (arg-spec arg-specs)
       (let* ((arg-name (car arg-spec))
              (properties (cdr arg-spec)))
@@ -358,7 +359,11 @@
                  (rplaca cell (apply #'modify-arg (copy-structure (car cell))
                                      length properties)))))))
     (setf (get name 'inst-format)
-          (make-inst-format name (bits-to-bytes length) printer args))))
+          (make-inst-format name (bits-to-bytes length)
+                            (or printer
+                                (and inherit
+                                     (sb-disassem::format-default-printer inherit)))
+                            args))))
 
 (defun modify-arg (arg format-length
                    &key   (value nil value-p)
diff --git a/xperfecthash63.lisp-expr b/xperfecthash63.lisp-expr
index 4c2c9b323..4fe00fdb0 100644
--- a/xperfecthash63.lisp-expr
+++ b/xperfecthash63.lisp-expr
@@ -1811,5 +1811,11 @@
 (#(359CB801 4D28C61A 53351B33 A2DD0906 B9B79FF6)
  "(FUNCTION SB-IMPL::PREDICATE SB-IMPL::KEY SB-IMPL::TEST SB-IMPL::TEST-NOT)"
  "((& (^ (>> val 3) (>> val 6)) 7))")
+(#(3EF40DEC 991CAE6F 9E1CB64E C60DEABC D10DFC0D D5FEF962 D6D10A2B DFFF0920)
+ "(:|2D| :D :|4S| :|2S| :|8H| :|4H| :|16B| :|8B|)"
+ "((& (^ val (>> val 2)) 7))")
+(#(3EF40DEC 991CAE6F 9E1CB64E D10DFC0D D5FEF962 D6D10A2B DFFF0920)
+ "(:D :|4S| :|2S| :|8H| :|4H| :|16B| :|8B|)"
+ "((& (- (>> val 25) (>> val 29)) 7))")
 )
 ;; EOF

-----------------------------------------------------------------------


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