[PATCH] Optimize sb-thread:barrier for arm64

Sahil Kang via Sbcl-devel <[email protected]> Mon, 15 Jun 2026 04:44:15 -0700
Newsgroups gmane.lisp.steel-bank.devel
Message-ID <CADZ4C_5+ueY4u1WLEEwYV6nQAEyazQasEbuwX_TcU5dzjUUPQw@mail.gmail.com>
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Hi everyone,

I've attached a small patch to optimize sb-thread:barrier on arm64:
right now, that macro emits a DMB SY instruction and this patch
updates it to emit DMB ISH, DMB ISHLD, or DMD ISHST if the arg is
:memory, :read, or :write.

Thanks,
Sahil

--0000000000003944650654495907
Content-Type: application/octet-stream; 
	name="0001-Optimize-sb-thread-barrier-for-arm64.patch"
Content-Disposition: attachment; 
	filename="0001-Optimize-sb-thread-barrier-for-arm64.patch"
Content-Transfer-Encoding: base64
Content-ID: <f_mqf544gn0>
X-Attachment-Id: f_mqf544gn0

RnJvbSA5MWFjYmVkNmE0NzRhYzYyZTlkMmMxNTg1ODIzNWRiNGU2MTg5NDdmIE1vbiBTZXAgMTcg
MDA6MDA6MDAgMjAwMQpGcm9tOiBTYWhpbCBLYW5nIDxzYWhpbC5rYW5nQGFzaWxheWNvbXB1dGlu
Zy5jb20+CkRhdGU6IE1vbiwgMTUgSnVuIDIwMjYgMDQ6MTk6NTkgLTA3MDAKU3ViamVjdDogW1BB
VENIXSBPcHRpbWl6ZSBzYi10aHJlYWQ6YmFycmllciBmb3IgYXJtNjQKCldoZW4gdXNpbmcgc2It
dGhyZWFkOmJhcnJpZXIgYmVmb3JlLCBhIGZ1bGwgRE1CIFNZIGluc3RydWN0aW9uIHdhcyBiZWlu
ZwplbWl0dGVkLiBUaGlzIHBhdGNoIHVwZGF0ZXMgdGhlIDptZW1vcnksIDpyZWFkLCBhbmQgOndy
aXRlIGFyZ3MgdG8gZW1pdApETUIgSVNILCBETUIgSVNITEQsIGFuZCBETUIgSVNIU1QgaW5zdHJ1
Y3Rpb25zLCByZXNwZWN0aXZlbHkuCgpUaGlzIGNoYW5nZSBzdGlsbCBhbGlnbnMgd2l0aCB0aGUg
c2ItdGhyZWFkOmJhcnJpZXIgZG9jc3RyaW5nLgotLS0KIHNyYy9jb21waWxlci9hcm02NC9zeXN0
ZW0ubGlzcCB8IDYgKysrLS0tCiAxIGZpbGUgY2hhbmdlZCwgMyBpbnNlcnRpb25zKCspLCAzIGRl
bGV0aW9ucygtKQoKZGlmZiAtLWdpdCBhL3NyYy9jb21waWxlci9hcm02NC9zeXN0ZW0ubGlzcCBi
L3NyYy9jb21waWxlci9hcm02NC9zeXN0ZW0ubGlzcAppbmRleCA4NzBkYjU1OGQuLjQ1YmFiYTE1
YSAxMDA2NDQKLS0tIGEvc3JjL2NvbXBpbGVyL2FybTY0L3N5c3RlbS5saXNwCisrKyBiL3NyYy9j
b21waWxlci9hcm02NC9zeXN0ZW0ubGlzcApAQCAtMjg1LDE5ICsyODUsMTkgQEAKICAgKDpwb2xp
Y3kgOmZhc3Qtc2FmZSkKICAgKDp0cmFuc2xhdGUgJW1lbW9yeS1iYXJyaWVyKQogICAoOmdlbmVy
YXRvciAzCi0gICAgKGluc3QgZG1iKSkpCisgICAgKGluc3QgZG1iIDppc2gpKSkKIAogKGRlZmlu
ZS12b3AgKCVyZWFkLWJhcnJpZXIpCiAgICg6cG9saWN5IDpmYXN0LXNhZmUpCiAgICg6dHJhbnNs
YXRlICVyZWFkLWJhcnJpZXIpCiAgICg6Z2VuZXJhdG9yIDMKLSAgICAoaW5zdCBkbWIpKSkKKyAg
ICAoaW5zdCBkbWIgOmlzaGxkKSkpCiAKIChkZWZpbmUtdm9wICgld3JpdGUtYmFycmllcikKICAg
KDpwb2xpY3kgOmZhc3Qtc2FmZSkKICAgKDp0cmFuc2xhdGUgJXdyaXRlLWJhcnJpZXIpCiAgICg6
Z2VuZXJhdG9yIDMKLSAgICAoaW5zdCBkbWIpKSkKKyAgICAoaW5zdCBkbWIgOmlzaHN0KSkpCiAK
IChkZWZpbmUtdm9wICglZGF0YS1kZXBlbmRlbmN5LWJhcnJpZXIpCiAgICg6cG9saWN5IDpmYXN0
LXNhZmUpCi0tIAoyLjUwLjEgKEFwcGxlIEdpdC0xNTUpCgo=
--0000000000003944650654495907
Content-Type: text/plain; charset="us-ascii"
MIME-Version: 1.0
Content-Transfer-Encoding: 7bit
Content-Disposition: inline


--0000000000003944650654495907
Content-Type: text/plain; charset="us-ascii"
MIME-Version: 1.0
Content-Transfer-Encoding: 7bit
Content-Disposition: inline

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