Re: Adapt sb-simd to read from SAPs

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Here=E2=80=99s a patch to implement the sap stuff on arm64. Should apply =
on top of 6f4d258f3 "Support for load/stor to and from SAPs=E2=80=9D.

Not tested but builds fine on my machine. I=E2=80=99ve eyeballed the =
disassembly and it looks right.


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> On 1 Aug 2026, at 15:13, Stas Boukarev <[email protected]> wrote:
>=20
> If you can make it just do nothing for arm64 that would also be fine.
>=20
> On Sat, Aug 1, 2026 at 4:03=E2=80=AFPM arthur miller =
<[email protected]> wrote:
>>=20
>>=20
>>> I think you need to enable it first.
>>=20
>> Ok, I have managed to enable actions, and to uploade my sap worktree:
>>=20
>> https://github.com/amno1/sbcl/tree/sb-simd-sap
>>=20
>> Unfortunately, I will have to dissapoint you, I can't do that one. I
>> have never done anything on arm cpu, so I really have no idea what I =
am
>> doing there. The interesting file is:
>>=20
>> =
https://github.com/amno1/sbcl/blob/sb-simd-sap/contrib/sb-simd/code/define=
-vref-vops.lisp
>>=20
>> The job is to calculate the EA from just SAP (base pointer) and =
without
>> array header. On x86 SBCL uses sap-reg as storage class for =
manipulating
>> SAPs in registers, I guess it would be the case on arm too, but I am
>> just guessing there. I was hoping when given the correct address,
>> generic load/store vops would take care of the rest, but it fails.
>>=20
>> Interestingly enough, it pass on linux arm, and qemu 64, but not on
>> linux arm64.
>>=20
>> If you can fix it, it would be nice. Otherwise if no one is =
interesting
>> about it, than I'll guess it will have to wait for better days :).
>=20
>=20
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