Re: car/cdr chain optimization

Stavros Macrakis <[email protected]> Mon, 3 Feb 2025 23:57:33 -0500
Newsgroups gmane.lisp.steel-bank.general
Message-ID <CACLVabV0mTdPVJbQEg9Ecm9-rVGU_As80-wSFT0UtFcdK87Wzw@mail.gmail.com>
PS I see only 2 type tests in

(disassemble (lambda (a b) (fff (car a) (car b) (car a) (car b))))

and 3 in

(disassemble (lambda (a b c) (xxx (car a) (car b) (cdr c) (car a) (cdr b)
(car c))))

so somehow it's remembering the types.

On Mon, Feb 3, 2025 at 11:29 PM Stavros Macrakis <[email protected]> wrote:

> Nice, thanks. Maybe I'll write a Lisp macro to handle the easy cases while
> you work on interfacing to LLVM....
>
> A lot of Maxima code today looks like:
>
> (cond ((numberp x) ...)
>       ((atom x) ...)
>       ((eq (caar x) 'mplus) ...) ;includes 2 listp checks
>       ((eq (caar x) 'mtimes ...) ;includes 2 listp checks
>        ...)
>
> It should be pretty straightforward to translate that to
>
> (defun unchecked-car (x) (car x))  ;; how do you write these?
> (defun unchecked-car (x)
>     (declare (optimize (speed 3) (space 3) (safety 0)))
>     (cdr x))  ;; does this work?
>
> (cond ((numberp x) ...)
>       ((atom x) ...)
>       ((eq (setq x-caar (car (unchecked-car x)) 'mplus)) ...) ; atom
> already checked
>       ((eq x-caar 'mtimes) ...)
>        ...)
>
>
>
>
> On Mon, Feb 3, 2025 at 7:03 PM Douglas Katzman <[email protected]> wrote:
>
>> The SBCL compiler is pretty much unaware of the concept of common
>> subexpression elimination.  One of my thoughts about how to really improve
>> it to compile into LLVM IR.  That idea brings with it a world of issues to
>> resolve in order to get there, but gives a glimmer of hope toward availing
>> ourselves of modern compiler techniques.
>> I wanted to see what would happen if we compile a C program that is
>> nearly equivalent to your EQ expression with type-check - does LLVM
>> eliminate the redundant read and type-check? Indeed it does. I've attached
>> the source and asm.  The asm contains only 3 memory loads (one is disguised
>> as a CMP in mem-to-reg form) and 2 conditional branches.  See attached if
>> you're curious.
>>
>

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