Re: Intel Active Management Technology (AMT): not necessarily your friend
Rob Landley <rob-VoJi6FS/[email protected]>
| Newsgroups | gmane.org.user-groups.linux.svlug |
|---|---|
| Message-ID | <[email protected]> |
On 05/06/2017 06:35 AM, Ivan Sergio Borgonovo wrote: > I don't know about architecture advantage of j-core vs RISC-V but > considering j-core is just on FPGA but you can buy real RISC-V and > considering who's behind RISC-V I'd bet on RISC-V. J-core is working with artanalog on first silicon: http://lists.j-core.org/pipermail/j-core/2017-March/000558.html I usually describe risc-v vs j-core vs as being a lot like Pascal vs C. One was a large group of academics coming up with "the right way to do it" without any specific use case in mind, let alone dogfooding. The other was a small team of engineers making a tool for their own use and refining it as they used it. Not hugely relevant except that the theme of the message was featuritis... :) Rob