[PATCH v3] Cygwin: Add AArch64 support for signal handling and ucontext
Aswin Kalies Ramkumar Mangayarkarasi <[email protected]> Wed, 22 Jul 2026 12:51:27 +0000
| Newsgroups | gmane.os.cygwin.patches |
|---|---|
| Message-ID | <PN3P287MB132037F714481EAD3C475C65F7C12@PN3P287MB1320.INDP287.PROD.OUTLOOK.COM> |
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Hi Jon,
Thanks for the review.
This is a follow-up patch to: https://cygwin.com/pipermail/cygwin-patches/2=
026q3/015206.html
Responses inline below; v3 addresses all of the review points.
For testing, we built a standalone ucontext/altstack test suite and ran it =
against a freshly built cygwin1.dll on Windows ARM64. The tests cover getco=
ntext/setcontext/swapcontext/makecontext round-trips, odd argument counts (=
9=9613), NULL uc_link exit behaviour, a 5000-iteration swapcontext loop, an=
d an SA_ONSTACK signal handler.
We also ran a four-way isolation matrix where each branch reverted exactly =
one of the three fixes to verify that each change is independently required=
. Reverting the setcontext hand-restore causes every makecontext/swapcontex=
t test to crash with STATUS_STACK_BUFFER_OVERRUN, matching the pre-port bas=
eline. Reverting the trampoline (including the sp,x19 fix and mov w0,#0xff)=
causes the odd-argc tests to fail with STATUS_DATATYPE_MISALIGNMENT, and t=
he NULL uc_link test exits with 0 instead of 0xff.
I agree there's nothing in the upstream testsuite covering this yet. I'm ha=
ppy to contribute these tests as a follow-up if that would be useful.
Regarding the clobber list in call_signal_handler, the previous comment was=
misleading. The clobber list is serving two distinct purposes, and I've re=
written the comment to explain that. x0-x7, x9, x10, and x29 are explicitly=
used by the assembly as scratch/argument registers and are listed as clobb=
ers to prevent GCC from allocating "r" input operands into registers that t=
he assembly overwrites before reading. The x86_64 version doesn't need this=
because its inputs are "o" memory operands. x8, x11-x17, x30 (clobbered by=
blr), and v0-v7/v16-v31 are the normal caller-saved registers clobbered by=
the C call to altstack_wrapper. x18 (TEB) and v8-v15 (callee-saved on Wind=
ows) are preserved and therefore omitted.
So the registers you pointed out aren't redundant with the explicit save/r=
estore sequence. Removing them would allow GCC to place an input operand in=
to a register that the assembly overwrites before reading it. That said, I'=
m also happy to convert this path to "o" memory operands like the x86_64 im=
plementation if you think that's the cleaner approach. I kept "r" operands =
simply to minimise churn in the already-tested assembly.
For RtlRestoreContext, unfortunately I haven't found any Microsoft documen=
tation describing this behaviour. The STATUS_ILLEGAL_INSTRUCTION failure on=
a synthetic context was discovered empirically. I also tried setting Conte=
xtFlags =3D CONTEXT_FULL on the makecontext-generated context in case RtlRe=
storeContext required a particular flag mask, but it made no difference. Th=
e hand-restore is genuinely required. I've added a comment noting this.
For the 272 constant, I've added a comment explaining that it's the byte o=
ffset of the V-register array within struct __mcontext, whose layout mirror=
s the Windows ARM64 CONTEXT structure. The comment now also documents all o=
ffsets used by the routine.
Regarding x17 and CPSR not being restored in setcontext, this is the same =
asymmetry as in the earlier incyg fix, but you're right that it should be d=
ocumented explicitly rather than left implicit. The omission is intentional=
. x16 (IP0) and x17 (IP1) are the ABI-defined intra-procedure-call scratch =
registers. This implementation uses x16 as the base register and x17 as the=
branch target, and the ABI already permits linker-inserted veneers to clob=
ber both registers, so a ucontext consumer cannot rely on either surviving =
a setcontext() regardless. Their saved values are therefore intentionally n=
ot restored. CPSR is likewise not restored because there is no EL0 instruct=
ion that restores the entire register, and the only architecturally visible=
state that user code could reasonably care about (NZCV) is caller-clobbere=
d across the makecontext()/swapcontext() boundary that this code serves. gl=
ibc and musl take the same approach on AArch64. I've added comments explain=
ing this.
Finally, I've fixed both the "return address on the stack" comment and the=
missing makecontext #error cases. The header comment now states that the c=
ontinuation trampoline is reached via a stack return slot on x86_64 but via=
lr on AArch64. I also added the missing #else / #error unimplemented for t=
his target to each of the four #if defined(x86_64) / #elif defined(aarch64)=
blocks in makecontext.
Inline patch
---
winsup/cygwin/exceptions.cc | 345 +++++++++++++++++++++++++++++++-----
1 file changed, 304 insertions(+), 41 deletions(-)
diff --git a/winsup/cygwin/exceptions.cc b/winsup/cygwin/exceptions.cc
index 1e129b319..4224cdfcf 100644
--- a/winsup/cygwin/exceptions.cc
+++ b/winsup/cygwin/exceptions.cc
@@ -1892,7 +1892,7 @@ _cygtls::call_signal_handler ()
/* In assembler: Save regs on new stack, move to alternate stack,
call thisfunc, revert stack regs. */
-#ifdef __x86_64__
+#if defined(__x86_64__)
/* Clobbered regs: rcx, rdx, r8, r9, r10, r11, rbp, rsp */
__asm__ ("\n\
movq %[NEW_SP], %%rax # Load alt stack into rax \n\
@@ -1930,6 +1930,66 @@ _cygtls::call_signal_handler ()
[FUNC] "o" (thisfunc),
[WRAPPER] "o" (altstack_wrapper)
: "memory");
+#elif defined(__aarch64__)
+ __asm__ ("\n\
+ mov x9, %[NEW_SP] // Load alt stack into x9 \n\
+ sub x9, x9, #0x60 // Make room on alt stack \n\
+ // for clobbered regs \n\
+ str x0, [x9, #0x00] // Save clobbered regs \n\
+ str x1, [x9, #0x08] \n\
+ str x2, [x9, #0x10] \n\
+ str x3, [x9, #0x18] \n\
+ str x4, [x9, #0x20] \n\
+ str x5, [x9, #0x28] \n\
+ str x6, [x9, #0x30] \n\
+ str x7, [x9, #0x38] \n\
+ str fp, [x9, #0x40] \n\
+ mov x10, sp // Copy sp into x10 for saving \n\
+ str x10, [x9, #0x48] \n\
+ str x30, [x9, #0x50] // Save link register \n\
+ mov x0, %[SIG] // thissig to 1st arg reg \n\
+ mov x1, %[SI] // &thissi to 2nd arg reg \n\
+ mov x2, %[CTX] // thiscontext to 3rd arg reg \n\
+ mov x3, %[FUNC] // thisfunc to x3 \n\
+ mov x4, %[WRAPPER] // wrapper address to x4 \n\
+ mov sp, x9 // Move alt stack into sp \n\
+ blr x4 // Call wrapper \n\
+ mov x9, sp // Restore clobbered regs \n\
+ ldr x30, [x9, #0x50] // Restore link register \n\
+ ldr x10, [x9, #0x48] \n\
+ ldr fp, [x9, #0x40] \n\
+ ldr x7, [x9, #0x38] \n\
+ ldr x6, [x9, #0x30] \n\
+ ldr x5, [x9, #0x28] \n\
+ ldr x4, [x9, #0x20] \n\
+ ldr x3, [x9, #0x18] \n\
+ ldr x2, [x9, #0x10] \n\
+ ldr x1, [x9, #0x08] \n\
+ ldr x0, [x9, #0x00] \n\
+ mov sp, x10 // Restore stack pointer \n"
+ : : [NEW_SP] "r" (new_sp),
+ [SIG] "r" (thissig),
+ [SI] "r" (&thissi),
+ [CTX] "r" (thiscontext),
+ [FUNC] "r" (thisfunc),
+ [WRAPPER] "r" (altstack_wrapper)
+ /* The clobber list serves two roles here. x0-x7, x9, x10
+ and x29 are hardcoded by this asm as scratch/argument
+ registers, so they are listed to stop gcc allocating the
+ "r" inputs into them. (The x86_64 path above needs no
+ such guard because its inputs are "o" memory operands.)
+ The remaining registers - x8, x11-x17, x30 (trampled by
+ the blr) and v0-v7/v16-v31 - are caller-saved and clobbered
+ by the ordinary C call to altstack_wrapper. x18 (the
+ Windows TEB pointer) and v8-v15 (callee-saved on Windows)
+ survive the call and are omitted. */
+ : "memory", "cc",
+ "x0", "x1", "x2", "x3", "x4", "x5", "x6", "x7",
+ "x8", "x9", "x10", "x11", "x12", "x13", "x14", "x15",
+ "x16", "x17", "x29", "x30",
+ "v0", "v1", "v2", "v3", "v4", "v5", "v6", "v7",
+ "v16", "v17", "v18", "v19", "v20", "v21", "v22", "v23",
+ "v24", "v25", "v26", "v27", "v28", "v29", "v30", "v31");
#else
#error unimplemented for this target
#endif
@@ -2009,10 +2069,89 @@ setcontext (const ucontext_t *ucp)
{
PCONTEXT ctx =3D (PCONTEXT) &ucp->uc_mcontext;
set_signal_mask (_my_tls.sigmask, ucp->uc_sigmask);
+#if defined(__aarch64__)
+ /* On ARM64, RtlRestoreContext raises STATUS_ILLEGAL_INSTRUCTION when as=
ked
+ to restore a synthetic context built by makecontext rather than one
+ captured by RtlCaptureContext/GetThreadContext: it rejects an arbitra=
ry
+ PC and a stack outside the thread's registered range. Restore the
+ registers by hand and branch to the saved PC instead, as glibc/musl d=
o
+ for aarch64.
+
+ The numeric offsets below are byte offsets into struct __mcontext, wh=
ose
+ layout mirrors the Windows ARM64 CONTEXT: x0/x1 @8, x2-x15 @24-120,
+ x18-x28/fp @152-232, lr @248, sp @256, pc @264, v[0..31] @272 (16 byt=
es
+ each), fpcr @784, fpsr @788.
+
+ x16 (IP0) and x17 (IP1) are the ABI intra-procedure-call scratch
+ registers: their values in the context are deliberately not restored.
+ We reuse x16 as the base pointer and x17 as the branch target, and th=
e
+ ABI permits the linker to clobber x16/x17 in any call/branch veneer, =
so a
+ ucontext consumer may not rely on them surviving a setcontext. CPSR =
is
+ likewise not restored: it cannot be written from EL0 with a plain msr=
,
+ the only flags of interest (NZCV) are caller-clobbered across the
+ makecontext/swapcontext boundary this path serves, and glibc/musl tak=
e
+ the same approach for aarch64. */
+ register PCONTEXT base __asm__ ("x16") =3D ctx;
+ __asm__ __volatile__ ("\n\
+ add x17, x16, #272 \n\
+ ldp q0, q1, [x17, #0] \n\
+ ldp q2, q3, [x17, #32] \n\
+ ldp q4, q5, [x17, #64] \n\
+ ldp q6, q7, [x17, #96] \n\
+ ldp q8, q9, [x17, #128] \n\
+ ldp q10, q11, [x17, #160] \n\
+ ldp q12, q13, [x17, #192] \n\
+ ldp q14, q15, [x17, #224] \n\
+ ldp q16, q17, [x17, #256] \n\
+ ldp q18, q19, [x17, #288] \n\
+ ldp q20, q21, [x17, #320] \n\
+ ldp q22, q23, [x17, #352] \n\
+ ldp q24, q25, [x17, #384] \n\
+ ldp q26, q27, [x17, #416] \n\
+ ldp q28, q29, [x17, #448] \n\
+ ldp q30, q31, [x17, #480] \n\
+ /* Restore FPCR and FPSR */ \n\
+ ldr w17, [x16, #784] \n\
+ msr fpcr, x17 \n\
+ ldr w17, [x16, #788] \n\
+ msr fpsr, x17 \n\
+ /* Load PC into x17 (branch target, offset 264) */ \n\
+ ldr x17, [x16, #264] \n\
+ /* Restore callee-saved GPRs x18..x28, fp, lr */ \n\
+ ldp x18, x19, [x16, #152] \n\
+ ldp x20, x21, [x16, #168] \n\
+ ldp x22, x23, [x16, #184] \n\
+ ldp x24, x25, [x16, #200] \n\
+ ldp x26, x27, [x16, #216] \n\
+ ldp x28, x29, [x16, #232] \n\
+ ldr x30, [x16, #248] \n\
+ /* Restore caller-saved GPRs x2..x15 */ \n\
+ ldp x2, x3, [x16, #24] \n\
+ ldp x4, x5, [x16, #40] \n\
+ ldp x6, x7, [x16, #56] \n\
+ ldp x8, x9, [x16, #72] \n\
+ ldp x10, x11, [x16, #88] \n\
+ ldp x12, x13, [x16, #104] \n\
+ ldp x14, x15, [x16, #120] \n\
+ /* Restore x0, x1 */ \n\
+ ldp x0, x1, [x16, #8] \n\
+ /* Set SP from context (last use of x16 as base) */ \n\
+ ldr x16, [x16, #256] \n\
+ mov sp, x16 \n\
+ /* Branch to saved PC */ \n\
+ br x17 \n\
+"
+ : /* no outputs (noreturn) */
+ : "r" (base)
+ : "memory"
+ );
+ __builtin_unreachable ();
+#else
RtlRestoreContext (ctx, NULL);
/* If we got here, something was wrong. */
set_errno (EINVAL);
return -1;
+#endif
}
extern "C" int
@@ -2049,7 +2188,7 @@ swapcontext (ucontext_t *oucp, const ucontext_t *ucp)
/* Trampoline function to set the context to uc_link. The pointer to the
address of uc_link is stored in a callee-saved register, referenced by
_MC_uclinkReg from the C code. If uc_link is NULL, call exit. */
-#ifdef __x86_64__
+#if defined(__x86_64__)
/* _MC_uclinkReg =3D=3D %rbx */
__asm__ (" \n\
.global __cont_link_context \n\
@@ -2070,19 +2209,50 @@ __cont_link_context: \n\
nop \n\
.seh_endproc \n\
");
-
+#elif defined(__aarch64__)
+/* _MC_uclinkReg =3D=3D x19. x19 holds the address of the uc_link slot =
but is
+ only 8-byte aligned, so read through it and mask into SP in one step
+ rather than moving the unaligned value into SP first. setcontext and
+ cygwin_exit are noreturn, so tail-call them with 'b': this leaves x30
+ untouched and keeps the frame leaf, matching the empty SEH prologue. */
+__asm__ (" \n\
+ .global __cont_link_context \n\
+ .seh_proc __cont_link_context \n\
+__cont_link_context: \n\
+ .seh_endprologue \n\
+ ldr x0, [x19] \n\
+ and sp, x19, #~0xf \n\
+ cbnz x0, 1f \n\
+ mov w0, #0xff \n\
+ b cygwin_exit \n\
+1: \n\
+ b setcontext \n\
+ .seh_endproc \n"
+ );
#else
#error unimplemented for this target
#endif
/* makecontext is modelled after GLibc's makecontext. The stack from uc_s=
tack
is prepared so that it starts with a pointer to the linked context uc_l=
ink,
- followed by the arguments to func, and finally at the bottom the "retur=
n"
- address set to __cont_link_context. In the ucp context, rbx/ebx is set=
to
- point to the stack address where the pointer to uc_link is stored. The
- requirement to make this work is that rbx/ebx are callee-saved register=
s
- per the ABI. If any function is called which doesn't follow the ABI
- conventions, e.g. assembler code, this method will break. But that's o=
k. */
+ followed by the arguments to func.
+
+ The trampoline __cont_link_context is reached differently per target: o=
n
+ x86_64 its address is written at the bottom of the stack as the "return=
"
+ address, whereas on aarch64 it is placed in lr (see below), since the
+ AArch64 ABI returns through the link register rather than the stack.
+
+ x86_64: In the ucp context, rbx is set to point to the stack address wh=
ere
+ the pointer to uc_link is stored. The requirement to make this work is=
that
+ rbx is a callee-saved register per the ABI.
+
+ ARM64: In the ucp context, x19 is set to point to the stack address whe=
re
+ the pointer to uc_link is stored. The requirement is that x19 is a
+ callee-saved register per the ARM64 ABI.
+
+ If any function is called which doesn't follow the ABI conventions, e.g=
.
+ assembler code, this method will break. But that's ok. */
+
extern "C" void
makecontext (ucontext_t *ucp, void (*func) (void), int argc, ...)
{
@@ -2090,65 +2260,158 @@ makecontext (ucontext_t *ucp, void (*func) (void),=
int argc, ...)
uintptr_t *sp;
va_list ap;
+#if defined(__x86_64__)
+ /* x86_64: Arguments beyond the first 4 go on the stack.
+ However, we allocate shadow space for all args including register arg=
s. */
+ int stack_args =3D argc;
+
+#elif defined(__aarch64__)
+ /* ARM64: Arguments beyond the first 8 go on the stack.
+ We only allocate stack space for args beyond registers. */
+ int stack_args =3D (argc > 8) ? (argc - 8) : 0;
+
+#else
+#error unimplemented for this target
+#endif
+
/* Initialize sp to the top of the stack. */
sp =3D (uintptr_t *) ((uintptr_t) ucp->uc_stack.ss_sp + ucp->uc_stack.ss=
_size);
- /* Subtract slots required for arguments and the pointer to uc_link. */
- sp -=3D (argc + 1);
- /* Align. */
- sp =3D (uintptr_t *) ((uintptr_t) sp & ~0xf);
- /* Subtract one slot for setting the return address. */
+
+#if defined(__x86_64__)
+ /* x86_64: Subtract slots for all arguments + uc_link pointer
+ and return address. */
+ sp -=3D (stack_args + 1); /* argc + 1 for uc_link */
+ /* Align to 16 bytes. */
+ sp =3D (uintptr_t *) ((uintptr_t) sp & ~0xfUL);
+ /* Subtract one more slot for the return address. */
--sp;
- /* Set return address to the trampolin function __cont_link_context. */
+ /* Set return address to the trampoline function __cont_link_context. */
sp[0] =3D (uintptr_t) __cont_link_context;
- /* Fetch arguments and store them on the stack.
- x86_64:
+#elif defined(__aarch64__)
+ /* ARM64: Subtract slots for stack arguments + uc_link pointer. */
+ sp -=3D (stack_args + 1); /* stack_args + 1 for uc_link */
+ /* ARM64 requires 16-byte alignment at public interfaces. */
+ sp =3D (uintptr_t *) ((uintptr_t) sp & ~0xfUL);
- - Store first four args in the AMD64 ABI arg registers.
+#else
+#error unimplemented for this target
+#endif
+ /* Fetch arguments and store them.
+ x86_64:
+ - Store first four args in the AMD64 ABI arg registers (rcx, rdx, r8,=
r9).
- Note that the stack is not short by these four register args. The
reason is the shadow space for these regs required by the AMD64 ABI=
.
-
- The definition of makecontext only allows for "int" sized arguments=
to
func, 32 bit, likely for historical reasons. However, the argument
slots on x86_64 are 64 bit anyway, so we can fetch and store the ar=
gs
as 64 bit values, and func can request 64 bit args without violatin=
g
the definition. This potentially allows porting 32 bit application=
s
- providing pointer values to func without additional porting effort.=
*/
+ providing pointer values to func without additional porting effort.
+
+ ARM64:
+ - Store first eight args in ARM64 ABI arg registers (x0-x7).
+ - Arguments beyond 8 go on the stack.
+ - Similar to x86_64, we store as uintptr_t for pointer compatibility.=
*/
+
va_start (ap, argc);
for (int i =3D 0; i < argc; ++i)
-#ifdef __x86_64__
- switch (i)
- {
- case 0:
- ucp->uc_mcontext.rcx =3D va_arg (ap, uintptr_t);
- break;
- case 1:
- ucp->uc_mcontext.rdx =3D va_arg (ap, uintptr_t);
- break;
- case 2:
- ucp->uc_mcontext.r8 =3D va_arg (ap, uintptr_t);
- break;
- case 3:
- ucp->uc_mcontext.r9 =3D va_arg (ap, uintptr_t);
- break;
- default:
- sp[i + 1] =3D va_arg (ap, uintptr_t);
- break;
- }
+ {
+#if defined(__x86_64__)
+ switch (i)
+ {
+ case 0:
+ ucp->uc_mcontext.rcx =3D va_arg (ap, uintptr_t);
+ break;
+ case 1:
+ ucp->uc_mcontext.rdx =3D va_arg (ap, uintptr_t);
+ break;
+ case 2:
+ ucp->uc_mcontext.r8 =3D va_arg (ap, uintptr_t);
+ break;
+ case 3:
+ ucp->uc_mcontext.r9 =3D va_arg (ap, uintptr_t);
+ break;
+ default:
+ /* Stack arguments start at sp[i + 1] because sp[0] is return ad=
dress */
+ sp[i + 1] =3D va_arg (ap, uintptr_t);
+ break;
+ }
+
+#elif defined(__aarch64__)
+ switch (i)
+ {
+ case 0:
+ ucp->uc_mcontext.x0 =3D va_arg (ap, uintptr_t);
+ break;
+ case 1:
+ ucp->uc_mcontext.x1 =3D va_arg (ap, uintptr_t);
+ break;
+ case 2:
+ ucp->uc_mcontext.x2 =3D va_arg (ap, uintptr_t);
+ break;
+ case 3:
+ ucp->uc_mcontext.x3 =3D va_arg (ap, uintptr_t);
+ break;
+ case 4:
+ ucp->uc_mcontext.x4 =3D va_arg (ap, uintptr_t);
+ break;
+ case 5:
+ ucp->uc_mcontext.x5 =3D va_arg (ap, uintptr_t);
+ break;
+ case 6:
+ ucp->uc_mcontext.x6 =3D va_arg (ap, uintptr_t);
+ break;
+ case 7:
+ ucp->uc_mcontext.x7 =3D va_arg (ap, uintptr_t);
+ break;
+ default:
+ /* Stack arguments beyond the first 8 registers. */
+ sp[i - 8] =3D va_arg (ap, uintptr_t);
+ break;
+ }
#else
#error unimplemented for this target
#endif
+ }
va_end (ap);
- /* Store pointer to uc_link at the top of the stack. */
+
+#if defined(__x86_64__)
+ /* Store pointer to uc_link at sp[argc + 1], after return address
+ and args. */
sp[argc + 1] =3D (uintptr_t) ucp->uc_link;
+
+#elif defined(__aarch64__)
+ /* Store pointer to uc_link at the top of our allocated area. */
+ sp[stack_args] =3D (uintptr_t) ucp->uc_link;
+
+#else
+#error unimplemented for this target
+#endif
+
/* Last but not least set the register in the context at ucp so that a
subsequent setcontext or swapcontext picks up the right values:
- Set instruction pointer to the target function.
- Set stack pointer to the just computed stack pointer value.
- Set Cygwin-specific uclink register to the address of the pointer
- to uc_link. */
+ to uc_link.
+
+ x86_64: uclink register is rbx (callee-saved)
+ ARM64: uclink register is x19 (callee-saved) */
+
ucp->uc_mcontext._MC_instPtr =3D (uint64_t) func;
ucp->uc_mcontext._MC_stackPtr =3D (uint64_t) sp;
+
+#if defined(__x86_64__)
ucp->uc_mcontext._MC_uclinkReg =3D (uint64_t) (sp + argc + 1);
+
+#elif defined(__aarch64__)
+ /* Set LR to __cont_link_context for ARM64 (used as return address). */
+ ucp->uc_mcontext.lr =3D (uint64_t) __cont_link_context;
+ ucp->uc_mcontext._MC_uclinkReg =3D (uint64_t) (sp + stack_args);
+
+#else
+#error unimplemented for this target
+#endif
}
--
2.50.1.windows.1
--_004_PN3P287MB132037F714481EAD3C475C65F7C12PN3P287MB1320INDP_
Content-Type: application/octet-stream;
name="Cygwin-Add-AArch64-support-for-signal-handling-and-u.patch"
Content-Description: Cygwin-Add-AArch64-support-for-signal-handling-and-u.patch
Content-Disposition: attachment;
filename="Cygwin-Add-AArch64-support-for-signal-handling-and-u.patch";
size=17091; creation-date="Wed, 22 Jul 2026 12:50:33 GMT";
modification-date="Wed, 22 Jul 2026 12:51:26 GMT"
Content-Transfer-Encoding: base64
RnJvbSBmNWIwM2ZlNWE3ZGM4MWM2MGNlZDYxYjUxZDVkYmI0ODkyNTgxODk5IE1vbiBTZXAgMTcg
MDA6MDA6MDAgMjAwMQpGcm9tOiBBc3dpbiBLYWxpZXMgUmFta3VtYXIgTWFuZ2F5YXJrYXJhc2kg
PGFzd2luLmthbGllc0BtdWx0aWNvcmV3YXJlaW5jLmNvbT4KRGF0ZTogV2VkLCAyMiBKdWwgMjAy
NiAxNzo1NTo0NCArMDUzMApTdWJqZWN0OiBbUEFUQ0ggdjNdIEN5Z3dpbjogQWRkIEFBcmNoNjQg
c3VwcG9ydCBmb3Igc2lnbmFsIGhhbmRsaW5nIGFuZAogdWNvbnRleHQKCkFkZCB0aGUgQUFyY2g2
NCBpbXBsZW1lbnRhdGlvbnMgdGhhdCB3ZXJlIHByZXZpb3VzbHkgI2Vycm9yIHN0dWJzOgogIC0g
dGhlIGFsdGVybmF0ZS1zaWduYWwtc3RhY2sgKFNBX09OU1RBQ0spIGFzbSBpbiBjYWxsX3NpZ25h
bF9oYW5kbGVyLAogIC0gdGhlIF9fY29udF9saW5rX2NvbnRleHQgdHJhbXBvbGluZSwgYW5kCiAg
LSBzZXRjb250ZXh0L21ha2Vjb250ZXh0IGZvciBhYXJjaDY0LgpTaWduYWwgZGVsaXZlcnkgaXRz
ZWxmIGFscmVhZHkgd29ya2VkOyB0aGlzIGZpbGxzIGluIHRoZSBTQV9PTlNUQUNLIGFuZAp1Y29u
dGV4dCBwYXRocy4KClNpZ25lZC1vZmYtYnk6IENoYW5kcnUgS3VtYXJlc2FuIDxjaGFuZHJ1Lmt1
bWFyZXNhbkBtdWx0aWNvcmV3YXJlaW5jLmNvbT4KU2lnbmVkLW9mZi1ieTogQXN3aW4gS2FsaWVz
IDxhc3dpbi5rYWxpZXNAbXVsdGljb3Jld2FyZWluYy5jb20+Ci0tLQogd2luc3VwL2N5Z3dpbi9l
eGNlcHRpb25zLmNjIHwgMzQ1ICsrKysrKysrKysrKysrKysrKysrKysrKysrKysrKystLS0tLQog
MSBmaWxlIGNoYW5nZWQsIDMwNCBpbnNlcnRpb25zKCspLCA0MSBkZWxldGlvbnMoLSkKCmRpZmYg
LS1naXQgYS93aW5zdXAvY3lnd2luL2V4Y2VwdGlvbnMuY2MgYi93aW5zdXAvY3lnd2luL2V4Y2Vw
dGlvbnMuY2MKaW5kZXggMWUxMjliMzE5Li40MjI0Y2RmY2YgMTAwNjQ0Ci0tLSBhL3dpbnN1cC9j
eWd3aW4vZXhjZXB0aW9ucy5jYworKysgYi93aW5zdXAvY3lnd2luL2V4Y2VwdGlvbnMuY2MKQEAg
LTE4OTIsNyArMTg5Miw3IEBAIF9jeWd0bHM6OmNhbGxfc2lnbmFsX2hhbmRsZXIgKCkKIAogCSAg
LyogSW4gYXNzZW1ibGVyOiBTYXZlIHJlZ3Mgb24gbmV3IHN0YWNrLCBtb3ZlIHRvIGFsdGVybmF0
ZSBzdGFjaywKIAkgICAgIGNhbGwgdGhpc2Z1bmMsIHJldmVydCBzdGFjayByZWdzLiAqLwotI2lm
ZGVmIF9feDg2XzY0X18KKyNpZiBkZWZpbmVkKF9feDg2XzY0X18pCiAJICAvKiBDbG9iYmVyZWQg
cmVnczogcmN4LCByZHgsIHI4LCByOSwgcjEwLCByMTEsIHJicCwgcnNwICovCiAJICBfX2FzbV9f
ICgiXG5cCiAJCSAgIG1vdnEgICVbTkVXX1NQXSwgJSVyYXggICMgTG9hZCBhbHQgc3RhY2sgaW50
byByYXgJXG5cCkBAIC0xOTMwLDYgKzE5MzAsNjYgQEAgX2N5Z3Rsczo6Y2FsbF9zaWduYWxfaGFu
ZGxlciAoKQogCQkgICAgICAgW0ZVTkNdCSJvIiAodGhpc2Z1bmMpLAogCQkgICAgICAgW1dSQVBQ
RVJdICJvIiAoYWx0c3RhY2tfd3JhcHBlcikKIAkJICAgOiAibWVtb3J5Iik7CisjZWxpZiBkZWZp
bmVkKF9fYWFyY2g2NF9fKQorCSAgX19hc21fXyAoIlxuXAorCQkgICBtb3YJeDksICVbTkVXX1NQ
XQkJLy8gTG9hZCBhbHQgc3RhY2sgaW50byB4OQlcblwKKwkJICAgc3ViCXg5LCB4OSwgIzB4NjAJ
CS8vIE1ha2Ugcm9vbSBvbiBhbHQgc3RhY2sJXG5cCisJCQkJCQkvLyBmb3IgY2xvYmJlcmVkIHJl
Z3MJCVxuXAorCQkgICBzdHIJeDAsIFt4OSwgIzB4MDBdCQkvLyBTYXZlIGNsb2JiZXJlZCByZWdz
CQlcblwKKwkJICAgc3RyCXgxLCBbeDksICMweDA4XQkJCQkJCVxuXAorCQkgICBzdHIJeDIsIFt4
OSwgIzB4MTBdCQkJCQkJXG5cCisJCSAgIHN0cgl4MywgW3g5LCAjMHgxOF0JCQkJCQlcblwKKwkJ
ICAgc3RyCXg0LCBbeDksICMweDIwXQkJCQkJCVxuXAorCQkgICBzdHIJeDUsIFt4OSwgIzB4Mjhd
CQkJCQkJXG5cCisJCSAgIHN0cgl4NiwgW3g5LCAjMHgzMF0JCQkJCQlcblwKKwkJICAgc3RyCXg3
LCBbeDksICMweDM4XQkJCQkJCVxuXAorCQkgICBzdHIJZnAsIFt4OSwgIzB4NDBdCQkJCQkJXG5c
CisJCSAgIG1vdgl4MTAsIHNwCQkJLy8gQ29weSBzcCBpbnRvIHgxMCBmb3Igc2F2aW5nCVxuXAor
CQkgICBzdHIJeDEwLCBbeDksICMweDQ4XQkJCQkJXG5cCisJCSAgIHN0cgl4MzAsIFt4OSwgIzB4
NTBdCS8vIFNhdmUgbGluayByZWdpc3RlcgkJXG5cCisJCSAgIG1vdgl4MCwgJVtTSUddCQkvLyB0
aGlzc2lnIHRvIDFzdCBhcmcgcmVnCVxuXAorCQkgICBtb3YJeDEsICVbU0ldCQkvLyAmdGhpc3Np
IHRvIDJuZCBhcmcgcmVnCVxuXAorCQkgICBtb3YJeDIsICVbQ1RYXQkJLy8gdGhpc2NvbnRleHQg
dG8gM3JkIGFyZyByZWcJXG5cCisJCSAgIG1vdgl4MywgJVtGVU5DXQkJLy8gdGhpc2Z1bmMgdG8g
eDMJCVxuXAorCQkgICBtb3YJeDQsICVbV1JBUFBFUl0JCS8vIHdyYXBwZXIgYWRkcmVzcyB0byB4
NAlcblwKKwkJICAgbW92CXNwLCB4OQkJCS8vIE1vdmUgYWx0IHN0YWNrIGludG8gc3AJXG5cCisJ
CSAgIGJscgl4NAkJCS8vIENhbGwgd3JhcHBlcgkJCVxuXAorCQkgICBtb3YJeDksIHNwCQkJLy8g
UmVzdG9yZSBjbG9iYmVyZWQgcmVncwlcblwKKwkJICAgbGRyCXgzMCwgW3g5LCAjMHg1MF0JLy8g
UmVzdG9yZSBsaW5rIHJlZ2lzdGVyCVxuXAorCQkgICBsZHIJeDEwLCBbeDksICMweDQ4XQkJCQkJ
XG5cCisJCSAgIGxkcglmcCwgIFt4OSwgIzB4NDBdCQkJCQlcblwKKwkJICAgbGRyCXg3LCAgW3g5
LCAjMHgzOF0JCQkJCVxuXAorCQkgICBsZHIJeDYsICBbeDksICMweDMwXQkJCQkJXG5cCisJCSAg
IGxkcgl4NSwgIFt4OSwgIzB4MjhdCQkJCQlcblwKKwkJICAgbGRyCXg0LCAgW3g5LCAjMHgyMF0J
CQkJCVxuXAorCQkgICBsZHIJeDMsICBbeDksICMweDE4XQkJCQkJXG5cCisJCSAgIGxkcgl4Miwg
IFt4OSwgIzB4MTBdCQkJCQlcblwKKwkJICAgbGRyCXgxLCAgW3g5LCAjMHgwOF0JCQkJCVxuXAor
CQkgICBsZHIJeDAsICBbeDksICMweDAwXQkJCQkJXG5cCisJCSAgIG1vdglzcCwgIHgxMAkJLy8g
UmVzdG9yZSBzdGFjayBwb2ludGVyCVxuIgorCQkgICA6IDogW05FV19TUF0JICJyIiAobmV3X3Nw
KSwKKwkJICAgICAgIFtTSUddCSAiciIgKHRoaXNzaWcpLAorCQkgICAgICAgW1NJXQkgInIiICgm
dGhpc3NpKSwKKwkJICAgICAgIFtDVFhdCSAiciIgKHRoaXNjb250ZXh0KSwKKwkJICAgICAgIFtG
VU5DXQkgInIiICh0aGlzZnVuYyksCisJCSAgICAgICBbV1JBUFBFUl0gInIiIChhbHRzdGFja193
cmFwcGVyKQorCQkgICAvKiBUaGUgY2xvYmJlciBsaXN0IHNlcnZlcyB0d28gcm9sZXMgaGVyZS4g
IHgwLXg3LCB4OSwgeDEwCisJCSAgICAgIGFuZCB4MjkgYXJlIGhhcmRjb2RlZCBieSB0aGlzIGFz
bSBhcyBzY3JhdGNoL2FyZ3VtZW50CisJCSAgICAgIHJlZ2lzdGVycywgc28gdGhleSBhcmUgbGlz
dGVkIHRvIHN0b3AgZ2NjIGFsbG9jYXRpbmcgdGhlCisJCSAgICAgICJyIiBpbnB1dHMgaW50byB0
aGVtLiAgKFRoZSB4ODZfNjQgcGF0aCBhYm92ZSBuZWVkcyBubworCQkgICAgICBzdWNoIGd1YXJk
IGJlY2F1c2UgaXRzIGlucHV0cyBhcmUgIm8iIG1lbW9yeSBvcGVyYW5kcy4pCisJCSAgICAgIFRo
ZSByZW1haW5pbmcgcmVnaXN0ZXJzIC0geDgsIHgxMS14MTcsIHgzMCAodHJhbXBsZWQgYnkKKwkJ
ICAgICAgdGhlIGJscikgYW5kIHYwLXY3L3YxNi12MzEgLSBhcmUgY2FsbGVyLXNhdmVkIGFuZCBj
bG9iYmVyZWQKKwkJICAgICAgYnkgdGhlIG9yZGluYXJ5IEMgY2FsbCB0byBhbHRzdGFja193cmFw
cGVyLiAgeDE4ICh0aGUKKwkJICAgICAgV2luZG93cyBURUIgcG9pbnRlcikgYW5kIHY4LXYxNSAo
Y2FsbGVlLXNhdmVkIG9uIFdpbmRvd3MpCisJCSAgICAgIHN1cnZpdmUgdGhlIGNhbGwgYW5kIGFy
ZSBvbWl0dGVkLiAgKi8KKwkJICAgOiAibWVtb3J5IiwgImNjIiwKKwkJICAgICAieDAiLCAieDEi
LCAieDIiLCAieDMiLCAieDQiLCAieDUiLCAieDYiLCAieDciLAorCQkgICAgICJ4OCIsICJ4OSIs
ICJ4MTAiLCAieDExIiwgIngxMiIsICJ4MTMiLCAieDE0IiwgIngxNSIsCisJCSAgICAgIngxNiIs
ICJ4MTciLCAieDI5IiwgIngzMCIsCisJCSAgICAgInYwIiwgInYxIiwgInYyIiwgInYzIiwgInY0
IiwgInY1IiwgInY2IiwgInY3IiwKKwkJICAgICAidjE2IiwgInYxNyIsICJ2MTgiLCAidjE5Iiwg
InYyMCIsICJ2MjEiLCAidjIyIiwgInYyMyIsCisJCSAgICAgInYyNCIsICJ2MjUiLCAidjI2Iiwg
InYyNyIsICJ2MjgiLCAidjI5IiwgInYzMCIsICJ2MzEiKTsKICNlbHNlCiAjZXJyb3IgdW5pbXBs
ZW1lbnRlZCBmb3IgdGhpcyB0YXJnZXQKICNlbmRpZgpAQCAtMjAwOSwxMCArMjA2OSw4OSBAQCBz
ZXRjb250ZXh0IChjb25zdCB1Y29udGV4dF90ICp1Y3ApCiB7CiAgIFBDT05URVhUIGN0eCA9IChQ
Q09OVEVYVCkgJnVjcC0+dWNfbWNvbnRleHQ7CiAgIHNldF9zaWduYWxfbWFzayAoX215X3Rscy5z
aWdtYXNrLCB1Y3AtPnVjX3NpZ21hc2spOworI2lmIGRlZmluZWQoX19hYXJjaDY0X18pCisgIC8q
IE9uIEFSTTY0LCBSdGxSZXN0b3JlQ29udGV4dCByYWlzZXMgU1RBVFVTX0lMTEVHQUxfSU5TVFJV
Q1RJT04gd2hlbiBhc2tlZAorICAgICB0byByZXN0b3JlIGEgc3ludGhldGljIGNvbnRleHQgYnVp
bHQgYnkgbWFrZWNvbnRleHQgcmF0aGVyIHRoYW4gb25lCisgICAgIGNhcHR1cmVkIGJ5IFJ0bENh
cHR1cmVDb250ZXh0L0dldFRocmVhZENvbnRleHQ6IGl0IHJlamVjdHMgYW4gYXJiaXRyYXJ5Cisg
ICAgIFBDIGFuZCBhIHN0YWNrIG91dHNpZGUgdGhlIHRocmVhZCdzIHJlZ2lzdGVyZWQgcmFuZ2Uu
ICBSZXN0b3JlIHRoZQorICAgICByZWdpc3RlcnMgYnkgaGFuZCBhbmQgYnJhbmNoIHRvIHRoZSBz
YXZlZCBQQyBpbnN0ZWFkLCBhcyBnbGliYy9tdXNsIGRvCisgICAgIGZvciBhYXJjaDY0LgorCisg
ICAgIFRoZSBudW1lcmljIG9mZnNldHMgYmVsb3cgYXJlIGJ5dGUgb2Zmc2V0cyBpbnRvIHN0cnVj
dCBfX21jb250ZXh0LCB3aG9zZQorICAgICBsYXlvdXQgbWlycm9ycyB0aGUgV2luZG93cyBBUk02
NCBDT05URVhUOiB4MC94MSBAOCwgeDIteDE1IEAyNC0xMjAsCisgICAgIHgxOC14MjgvZnAgQDE1
Mi0yMzIsIGxyIEAyNDgsIHNwIEAyNTYsIHBjIEAyNjQsIHZbMC4uMzFdIEAyNzIgKDE2IGJ5dGVz
CisgICAgIGVhY2gpLCBmcGNyIEA3ODQsIGZwc3IgQDc4OC4KKworICAgICB4MTYgKElQMCkgYW5k
IHgxNyAoSVAxKSBhcmUgdGhlIEFCSSBpbnRyYS1wcm9jZWR1cmUtY2FsbCBzY3JhdGNoCisgICAg
IHJlZ2lzdGVyczogdGhlaXIgdmFsdWVzIGluIHRoZSBjb250ZXh0IGFyZSBkZWxpYmVyYXRlbHkg
bm90IHJlc3RvcmVkLgorICAgICBXZSByZXVzZSB4MTYgYXMgdGhlIGJhc2UgcG9pbnRlciBhbmQg
eDE3IGFzIHRoZSBicmFuY2ggdGFyZ2V0LCBhbmQgdGhlCisgICAgIEFCSSBwZXJtaXRzIHRoZSBs
aW5rZXIgdG8gY2xvYmJlciB4MTYveDE3IGluIGFueSBjYWxsL2JyYW5jaCB2ZW5lZXIsIHNvIGEK
KyAgICAgdWNvbnRleHQgY29uc3VtZXIgbWF5IG5vdCByZWx5IG9uIHRoZW0gc3Vydml2aW5nIGEg
c2V0Y29udGV4dC4gIENQU1IgaXMKKyAgICAgbGlrZXdpc2Ugbm90IHJlc3RvcmVkOiBpdCBjYW5u
b3QgYmUgd3JpdHRlbiBmcm9tIEVMMCB3aXRoIGEgcGxhaW4gbXNyLAorICAgICB0aGUgb25seSBm
bGFncyBvZiBpbnRlcmVzdCAoTlpDVikgYXJlIGNhbGxlci1jbG9iYmVyZWQgYWNyb3NzIHRoZQor
ICAgICBtYWtlY29udGV4dC9zd2FwY29udGV4dCBib3VuZGFyeSB0aGlzIHBhdGggc2VydmVzLCBh
bmQgZ2xpYmMvbXVzbCB0YWtlCisgICAgIHRoZSBzYW1lIGFwcHJvYWNoIGZvciBhYXJjaDY0LiAg
Ki8KKyAgcmVnaXN0ZXIgUENPTlRFWFQgYmFzZSBfX2FzbV9fICgieDE2IikgPSBjdHg7CisgIF9f
YXNtX18gX192b2xhdGlsZV9fICgiXG5cCisJYWRkCXgxNywgeDE2LCAjMjcyCQkJCQlcblwKKwls
ZHAJcTAsIHExLCBbeDE3LCAjMF0JCQkJXG5cCisJbGRwCXEyLCBxMywgW3gxNywgIzMyXQkJCQlc
blwKKwlsZHAJcTQsIHE1LCBbeDE3LCAjNjRdCQkJCVxuXAorCWxkcAlxNiwgcTcsIFt4MTcsICM5
Nl0JCQkJXG5cCisJbGRwCXE4LCBxOSwgW3gxNywgIzEyOF0JCQkJXG5cCisJbGRwCXExMCwgcTEx
LCBbeDE3LCAjMTYwXQkJCQlcblwKKwlsZHAJcTEyLCBxMTMsIFt4MTcsICMxOTJdCQkJCVxuXAor
CWxkcAlxMTQsIHExNSwgW3gxNywgIzIyNF0JCQkJXG5cCisJbGRwCXExNiwgcTE3LCBbeDE3LCAj
MjU2XQkJCQlcblwKKwlsZHAJcTE4LCBxMTksIFt4MTcsICMyODhdCQkJCVxuXAorCWxkcAlxMjAs
IHEyMSwgW3gxNywgIzMyMF0JCQkJXG5cCisJbGRwCXEyMiwgcTIzLCBbeDE3LCAjMzUyXQkJCQlc
blwKKwlsZHAJcTI0LCBxMjUsIFt4MTcsICMzODRdCQkJCVxuXAorCWxkcAlxMjYsIHEyNywgW3gx
NywgIzQxNl0JCQkJXG5cCisJbGRwCXEyOCwgcTI5LCBbeDE3LCAjNDQ4XQkJCQlcblwKKwlsZHAJ
cTMwLCBxMzEsIFt4MTcsICM0ODBdCQkJCVxuXAorCS8qIFJlc3RvcmUgRlBDUiBhbmQgRlBTUiAq
LwkJCQlcblwKKwlsZHIJdzE3LCBbeDE2LCAjNzg0XQkJCQlcblwKKwltc3IJZnBjciwgeDE3CQkJ
CQlcblwKKwlsZHIJdzE3LCBbeDE2LCAjNzg4XQkJCQlcblwKKwltc3IJZnBzciwgeDE3CQkJCQlc
blwKKwkvKiBMb2FkIFBDIGludG8geDE3IChicmFuY2ggdGFyZ2V0LCBvZmZzZXQgMjY0KSAqLwlc
blwKKwlsZHIJeDE3LCBbeDE2LCAjMjY0XQkJCQlcblwKKwkvKiBSZXN0b3JlIGNhbGxlZS1zYXZl
ZCBHUFJzIHgxOC4ueDI4LCBmcCwgbHIgKi8JXG5cCisJbGRwCXgxOCwgeDE5LCBbeDE2LCAjMTUy
XQkJCQlcblwKKwlsZHAJeDIwLCB4MjEsIFt4MTYsICMxNjhdCQkJCVxuXAorCWxkcAl4MjIsIHgy
MywgW3gxNiwgIzE4NF0JCQkJXG5cCisJbGRwCXgyNCwgeDI1LCBbeDE2LCAjMjAwXQkJCQlcblwK
KwlsZHAJeDI2LCB4MjcsIFt4MTYsICMyMTZdCQkJCVxuXAorCWxkcAl4MjgsIHgyOSwgW3gxNiwg
IzIzMl0JCQkJXG5cCisJbGRyCXgzMCwgW3gxNiwgIzI0OF0JCQkJXG5cCisJLyogUmVzdG9yZSBj
YWxsZXItc2F2ZWQgR1BScyB4Mi4ueDE1ICovCQkJXG5cCisJbGRwCXgyLCB4MywgW3gxNiwgIzI0
XQkJCQlcblwKKwlsZHAJeDQsIHg1LCBbeDE2LCAjNDBdCQkJCVxuXAorCWxkcAl4NiwgeDcsIFt4
MTYsICM1Nl0JCQkJXG5cCisJbGRwCXg4LCB4OSwgW3gxNiwgIzcyXQkJCQlcblwKKwlsZHAJeDEw
LCB4MTEsIFt4MTYsICM4OF0JCQkJXG5cCisJbGRwCXgxMiwgeDEzLCBbeDE2LCAjMTA0XQkJCQlc
blwKKwlsZHAJeDE0LCB4MTUsIFt4MTYsICMxMjBdCQkJCVxuXAorCS8qIFJlc3RvcmUgeDAsIHgx
ICovCQkJCQlcblwKKwlsZHAJeDAsIHgxLCBbeDE2LCAjOF0JCQkJXG5cCisJLyogU2V0IFNQIGZy
b20gY29udGV4dCAobGFzdCB1c2Ugb2YgeDE2IGFzIGJhc2UpICovCVxuXAorCWxkcgl4MTYsIFt4
MTYsICMyNTZdCQkJCVxuXAorCW1vdglzcCwgeDE2CQkJCQkJXG5cCisJLyogQnJhbmNoIHRvIHNh
dmVkIFBDICovCQkJCVxuXAorCWJyCXgxNwkJCQkJCVxuXAorIgorCTogLyogbm8gb3V0cHV0cyAo
bm9yZXR1cm4pICovCisJOiAiciIgKGJhc2UpCisJOiAibWVtb3J5IgorICApOworICBfX2J1aWx0
aW5fdW5yZWFjaGFibGUgKCk7CisjZWxzZQogICBSdGxSZXN0b3JlQ29udGV4dCAoY3R4LCBOVUxM
KTsKICAgLyogSWYgd2UgZ290IGhlcmUsIHNvbWV0aGluZyB3YXMgd3JvbmcuICovCiAgIHNldF9l
cnJubyAoRUlOVkFMKTsKICAgcmV0dXJuIC0xOworI2VuZGlmCiB9CiAKIGV4dGVybiAiQyIgaW50
CkBAIC0yMDQ5LDcgKzIxODgsNyBAQCBzd2FwY29udGV4dCAodWNvbnRleHRfdCAqb3VjcCwgY29u
c3QgdWNvbnRleHRfdCAqdWNwKQogLyogVHJhbXBvbGluZSBmdW5jdGlvbiB0byBzZXQgdGhlIGNv
bnRleHQgdG8gdWNfbGluay4gIFRoZSBwb2ludGVyIHRvIHRoZQogICAgYWRkcmVzcyBvZiB1Y19s
aW5rIGlzIHN0b3JlZCBpbiBhIGNhbGxlZS1zYXZlZCByZWdpc3RlciwgcmVmZXJlbmNlZCBieQog
ICAgX01DX3VjbGlua1JlZyBmcm9tIHRoZSBDIGNvZGUuICBJZiB1Y19saW5rIGlzIE5VTEwsIGNh
bGwgZXhpdC4gKi8KLSNpZmRlZiBfX3g4Nl82NF9fCisjaWYgZGVmaW5lZChfX3g4Nl82NF9fKQog
LyogX01DX3VjbGlua1JlZyA9PSAlcmJ4ICovCiBfX2FzbV9fICgiCQkJCVxuXAogCS5nbG9iYWwJ
X19jb250X2xpbmtfY29udGV4dAlcblwKQEAgLTIwNzAsMTkgKzIyMDksNTAgQEAgX19jb250X2xp
bmtfY29udGV4dDoJCQlcblwKIAlub3AJCQkJXG5cCiAJLnNlaF9lbmRwcm9jCQkJXG5cCiAJIik7
Ci0KKyNlbGlmIGRlZmluZWQoX19hYXJjaDY0X18pCisvKglfTUNfdWNsaW5rUmVnID09IHgxOS4g
IHgxOSBob2xkcyB0aGUgYWRkcmVzcyBvZiB0aGUgdWNfbGluayBzbG90IGJ1dCBpcworCW9ubHkg
OC1ieXRlIGFsaWduZWQsIHNvIHJlYWQgdGhyb3VnaCBpdCBhbmQgbWFzayBpbnRvIFNQIGluIG9u
ZSBzdGVwCisJcmF0aGVyIHRoYW4gbW92aW5nIHRoZSB1bmFsaWduZWQgdmFsdWUgaW50byBTUCBm
aXJzdC4gIHNldGNvbnRleHQgYW5kCisJY3lnd2luX2V4aXQgYXJlIG5vcmV0dXJuLCBzbyB0YWls
LWNhbGwgdGhlbSB3aXRoICdiJzogdGhpcyBsZWF2ZXMgeDMwCisJdW50b3VjaGVkIGFuZCBrZWVw
cyB0aGUgZnJhbWUgbGVhZiwgbWF0Y2hpbmcgdGhlIGVtcHR5IFNFSCBwcm9sb2d1ZS4gKi8KK19f
YXNtX18gKCIJCQkJCVxuXAorCS5nbG9iYWwJX19jb250X2xpbmtfY29udGV4dAkJXG5cCisJLnNl
aF9wcm9jIF9fY29udF9saW5rX2NvbnRleHQJCVxuXAorX19jb250X2xpbmtfY29udGV4dDoJCQkJ
XG5cCisJLnNlaF9lbmRwcm9sb2d1ZQkJCVxuXAorCWxkcgl4MCwgW3gxOV0JCQlcblwKKwlhbmQJ
c3AsIHgxOSwgI34weGYJCQlcblwKKwljYm56CXgwLCAxZgkJCQlcblwKKwltb3YJdzAsICMweGZm
CQkJXG5cCisJYgljeWd3aW5fZXhpdAkJCVxuXAorMToJCQkJCQlcblwKKwliCXNldGNvbnRleHQJ
CQlcblwKKwkuc2VoX2VuZHByb2MJCQkJXG4iCisJKTsKICNlbHNlCiAjZXJyb3IgdW5pbXBsZW1l
bnRlZCBmb3IgdGhpcyB0YXJnZXQKICNlbmRpZgogCiAvKiBtYWtlY29udGV4dCBpcyBtb2RlbGxl
ZCBhZnRlciBHTGliYydzIG1ha2Vjb250ZXh0LiAgVGhlIHN0YWNrIGZyb20gdWNfc3RhY2sKICAg
IGlzIHByZXBhcmVkIHNvIHRoYXQgaXQgc3RhcnRzIHdpdGggYSBwb2ludGVyIHRvIHRoZSBsaW5r
ZWQgY29udGV4dCB1Y19saW5rLAotICAgZm9sbG93ZWQgYnkgdGhlIGFyZ3VtZW50cyB0byBmdW5j
LCBhbmQgZmluYWxseSBhdCB0aGUgYm90dG9tIHRoZSAicmV0dXJuIgotICAgYWRkcmVzcyBzZXQg
dG8gX19jb250X2xpbmtfY29udGV4dC4gIEluIHRoZSB1Y3AgY29udGV4dCwgcmJ4L2VieCBpcyBz
ZXQgdG8KLSAgIHBvaW50IHRvIHRoZSBzdGFjayBhZGRyZXNzIHdoZXJlIHRoZSBwb2ludGVyIHRv
IHVjX2xpbmsgaXMgc3RvcmVkLiAgVGhlCi0gICByZXF1aXJlbWVudCB0byBtYWtlIHRoaXMgd29y
ayBpcyB0aGF0IHJieC9lYnggYXJlIGNhbGxlZS1zYXZlZCByZWdpc3RlcnMKLSAgIHBlciB0aGUg
QUJJLiAgSWYgYW55IGZ1bmN0aW9uIGlzIGNhbGxlZCB3aGljaCBkb2Vzbid0IGZvbGxvdyB0aGUg
QUJJCi0gICBjb252ZW50aW9ucywgZS5nLiBhc3NlbWJsZXIgY29kZSwgdGhpcyBtZXRob2Qgd2ls
bCBicmVhay4gIEJ1dCB0aGF0J3Mgb2suICovCisgICBmb2xsb3dlZCBieSB0aGUgYXJndW1lbnRz
IHRvIGZ1bmMuCisKKyAgIFRoZSB0cmFtcG9saW5lIF9fY29udF9saW5rX2NvbnRleHQgaXMgcmVh
Y2hlZCBkaWZmZXJlbnRseSBwZXIgdGFyZ2V0OiBvbgorICAgeDg2XzY0IGl0cyBhZGRyZXNzIGlz
IHdyaXR0ZW4gYXQgdGhlIGJvdHRvbSBvZiB0aGUgc3RhY2sgYXMgdGhlICJyZXR1cm4iCisgICBh
ZGRyZXNzLCB3aGVyZWFzIG9uIGFhcmNoNjQgaXQgaXMgcGxhY2VkIGluIGxyIChzZWUgYmVsb3cp
LCBzaW5jZSB0aGUKKyAgIEFBcmNoNjQgQUJJIHJldHVybnMgdGhyb3VnaCB0aGUgbGluayByZWdp
c3RlciByYXRoZXIgdGhhbiB0aGUgc3RhY2suCisKKyAgIHg4Nl82NDogSW4gdGhlIHVjcCBjb250
ZXh0LCByYnggaXMgc2V0IHRvIHBvaW50IHRvIHRoZSBzdGFjayBhZGRyZXNzIHdoZXJlCisgICB0
aGUgcG9pbnRlciB0byB1Y19saW5rIGlzIHN0b3JlZC4gIFRoZSByZXF1aXJlbWVudCB0byBtYWtl
IHRoaXMgd29yayBpcyB0aGF0CisgICByYnggaXMgYSBjYWxsZWUtc2F2ZWQgcmVnaXN0ZXIgcGVy
IHRoZSBBQkkuCisKKyAgIEFSTTY0OiBJbiB0aGUgdWNwIGNvbnRleHQsIHgxOSBpcyBzZXQgdG8g
cG9pbnQgdG8gdGhlIHN0YWNrIGFkZHJlc3Mgd2hlcmUKKyAgIHRoZSBwb2ludGVyIHRvIHVjX2xp
bmsgaXMgc3RvcmVkLiAgVGhlIHJlcXVpcmVtZW50IGlzIHRoYXQgeDE5IGlzIGEKKyAgIGNhbGxl
ZS1zYXZlZCByZWdpc3RlciBwZXIgdGhlIEFSTTY0IEFCSS4KKworICAgSWYgYW55IGZ1bmN0aW9u
IGlzIGNhbGxlZCB3aGljaCBkb2Vzbid0IGZvbGxvdyB0aGUgQUJJIGNvbnZlbnRpb25zLCBlLmcu
CisgICBhc3NlbWJsZXIgY29kZSwgdGhpcyBtZXRob2Qgd2lsbCBicmVhay4gIEJ1dCB0aGF0J3Mg
b2suICovCisKIGV4dGVybiAiQyIgdm9pZAogbWFrZWNvbnRleHQgKHVjb250ZXh0X3QgKnVjcCwg
dm9pZCAoKmZ1bmMpICh2b2lkKSwgaW50IGFyZ2MsIC4uLikKIHsKQEAgLTIwOTAsNjUgKzIyNjAs
MTU4IEBAIG1ha2Vjb250ZXh0ICh1Y29udGV4dF90ICp1Y3AsIHZvaWQgKCpmdW5jKSAodm9pZCks
IGludCBhcmdjLCAuLi4pCiAgIHVpbnRwdHJfdCAqc3A7CiAgIHZhX2xpc3QgYXA7CiAKKyNpZiBk
ZWZpbmVkKF9feDg2XzY0X18pCisgIC8qIHg4Nl82NDogQXJndW1lbnRzIGJleW9uZCB0aGUgZmly
c3QgNCBnbyBvbiB0aGUgc3RhY2suCisgICAgIEhvd2V2ZXIsIHdlIGFsbG9jYXRlIHNoYWRvdyBz
cGFjZSBmb3IgYWxsIGFyZ3MgaW5jbHVkaW5nIHJlZ2lzdGVyIGFyZ3MuICovCisgIGludCBzdGFj
a19hcmdzID0gYXJnYzsKKworI2VsaWYgZGVmaW5lZChfX2FhcmNoNjRfXykKKyAgLyogQVJNNjQ6
IEFyZ3VtZW50cyBiZXlvbmQgdGhlIGZpcnN0IDggZ28gb24gdGhlIHN0YWNrLgorICAgICBXZSBv
bmx5IGFsbG9jYXRlIHN0YWNrIHNwYWNlIGZvciBhcmdzIGJleW9uZCByZWdpc3RlcnMuICovCisg
IGludCBzdGFja19hcmdzID0gKGFyZ2MgPiA4KSA/IChhcmdjIC0gOCkgOiAwOworCisjZWxzZQor
I2Vycm9yIHVuaW1wbGVtZW50ZWQgZm9yIHRoaXMgdGFyZ2V0CisjZW5kaWYKKwogICAvKiBJbml0
aWFsaXplIHNwIHRvIHRoZSB0b3Agb2YgdGhlIHN0YWNrLiAqLwogICBzcCA9ICh1aW50cHRyX3Qg
KikgKCh1aW50cHRyX3QpIHVjcC0+dWNfc3RhY2suc3Nfc3AgKyB1Y3AtPnVjX3N0YWNrLnNzX3Np
emUpOwotICAvKiBTdWJ0cmFjdCBzbG90cyByZXF1aXJlZCBmb3IgYXJndW1lbnRzIGFuZCB0aGUg
cG9pbnRlciB0byB1Y19saW5rLiAqLwotICBzcCAtPSAoYXJnYyArIDEpOwotICAvKiBBbGlnbi4g
Ki8KLSAgc3AgPSAodWludHB0cl90ICopICgodWludHB0cl90KSBzcCAmIH4weGYpOwotICAvKiBT
dWJ0cmFjdCBvbmUgc2xvdCBmb3Igc2V0dGluZyB0aGUgcmV0dXJuIGFkZHJlc3MuICovCisKKyNp
ZiBkZWZpbmVkKF9feDg2XzY0X18pCisgIC8qIHg4Nl82NDogU3VidHJhY3Qgc2xvdHMgZm9yIGFs
bCBhcmd1bWVudHMgKyB1Y19saW5rIHBvaW50ZXIKKyAgICAgYW5kIHJldHVybiBhZGRyZXNzLiAg
Ki8KKyAgc3AgLT0gKHN0YWNrX2FyZ3MgKyAxKTsgIC8qIGFyZ2MgKyAxIGZvciB1Y19saW5rICov
CisgIC8qIEFsaWduIHRvIDE2IGJ5dGVzLiAqLworICBzcCA9ICh1aW50cHRyX3QgKikgKCh1aW50
cHRyX3QpIHNwICYgfjB4ZlVMKTsKKyAgLyogU3VidHJhY3Qgb25lIG1vcmUgc2xvdCBmb3IgdGhl
IHJldHVybiBhZGRyZXNzLiAqLwogICAtLXNwOwotICAvKiBTZXQgcmV0dXJuIGFkZHJlc3MgdG8g
dGhlIHRyYW1wb2xpbiBmdW5jdGlvbiBfX2NvbnRfbGlua19jb250ZXh0LiAqLworICAvKiBTZXQg
cmV0dXJuIGFkZHJlc3MgdG8gdGhlIHRyYW1wb2xpbmUgZnVuY3Rpb24gX19jb250X2xpbmtfY29u
dGV4dC4gKi8KICAgc3BbMF0gPSAodWludHB0cl90KSBfX2NvbnRfbGlua19jb250ZXh0OwotICAv
KiBGZXRjaCBhcmd1bWVudHMgYW5kIHN0b3JlIHRoZW0gb24gdGhlIHN0YWNrLgogCi0gICAgIHg4
Nl82NDoKKyNlbGlmIGRlZmluZWQoX19hYXJjaDY0X18pCisgIC8qIEFSTTY0OiBTdWJ0cmFjdCBz
bG90cyBmb3Igc3RhY2sgYXJndW1lbnRzICsgdWNfbGluayBwb2ludGVyLiAqLworICBzcCAtPSAo
c3RhY2tfYXJncyArIDEpOyAgLyogc3RhY2tfYXJncyArIDEgZm9yIHVjX2xpbmsgKi8KKyAgLyog
QVJNNjQgcmVxdWlyZXMgMTYtYnl0ZSBhbGlnbm1lbnQgYXQgcHVibGljIGludGVyZmFjZXMuICov
CisgIHNwID0gKHVpbnRwdHJfdCAqKSAoKHVpbnRwdHJfdCkgc3AgJiB+MHhmVUwpOwogCi0gICAg
IC0gU3RvcmUgZmlyc3QgZm91ciBhcmdzIGluIHRoZSBBTUQ2NCBBQkkgYXJnIHJlZ2lzdGVycy4K
KyNlbHNlCisjZXJyb3IgdW5pbXBsZW1lbnRlZCBmb3IgdGhpcyB0YXJnZXQKKyNlbmRpZgogCisg
IC8qIEZldGNoIGFyZ3VtZW50cyBhbmQgc3RvcmUgdGhlbS4KKyAgICAgeDg2XzY0OgorICAgICAt
IFN0b3JlIGZpcnN0IGZvdXIgYXJncyBpbiB0aGUgQU1ENjQgQUJJIGFyZyByZWdpc3RlcnMgKHJj
eCwgcmR4LCByOCwgcjkpLgogICAgICAtIE5vdGUgdGhhdCB0aGUgc3RhY2sgaXMgbm90IHNob3J0
IGJ5IHRoZXNlIGZvdXIgcmVnaXN0ZXIgYXJncy4gIFRoZQogICAgICAgIHJlYXNvbiBpcyB0aGUg
c2hhZG93IHNwYWNlIGZvciB0aGVzZSByZWdzIHJlcXVpcmVkIGJ5IHRoZSBBTUQ2NCBBQkkuCi0K
ICAgICAgLSBUaGUgZGVmaW5pdGlvbiBvZiBtYWtlY29udGV4dCBvbmx5IGFsbG93cyBmb3IgImlu
dCIgc2l6ZWQgYXJndW1lbnRzIHRvCiAgICAgICAgZnVuYywgMzIgYml0LCBsaWtlbHkgZm9yIGhp
c3RvcmljYWwgcmVhc29ucy4gIEhvd2V2ZXIsIHRoZSBhcmd1bWVudAogICAgICAgIHNsb3RzIG9u
IHg4Nl82NCBhcmUgNjQgYml0IGFueXdheSwgc28gd2UgY2FuIGZldGNoIGFuZCBzdG9yZSB0aGUg
YXJncwogICAgICAgIGFzIDY0IGJpdCB2YWx1ZXMsIGFuZCBmdW5jIGNhbiByZXF1ZXN0IDY0IGJp
dCBhcmdzIHdpdGhvdXQgdmlvbGF0aW5nCiAgICAgICAgdGhlIGRlZmluaXRpb24uICBUaGlzIHBv
dGVudGlhbGx5IGFsbG93cyBwb3J0aW5nIDMyIGJpdCBhcHBsaWNhdGlvbnMKLSAgICAgICBwcm92
aWRpbmcgcG9pbnRlciB2YWx1ZXMgdG8gZnVuYyB3aXRob3V0IGFkZGl0aW9uYWwgcG9ydGluZyBl
ZmZvcnQuICovCisgICAgICAgcHJvdmlkaW5nIHBvaW50ZXIgdmFsdWVzIHRvIGZ1bmMgd2l0aG91
dCBhZGRpdGlvbmFsIHBvcnRpbmcgZWZmb3J0LgorCisgICAgIEFSTTY0OgorICAgICAtIFN0b3Jl
IGZpcnN0IGVpZ2h0IGFyZ3MgaW4gQVJNNjQgQUJJIGFyZyByZWdpc3RlcnMgKHgwLXg3KS4KKyAg
ICAgLSBBcmd1bWVudHMgYmV5b25kIDggZ28gb24gdGhlIHN0YWNrLgorICAgICAtIFNpbWlsYXIg
dG8geDg2XzY0LCB3ZSBzdG9yZSBhcyB1aW50cHRyX3QgZm9yIHBvaW50ZXIgY29tcGF0aWJpbGl0
eS4gKi8KKwogICB2YV9zdGFydCAoYXAsIGFyZ2MpOwogICBmb3IgKGludCBpID0gMDsgaSA8IGFy
Z2M7ICsraSkKLSNpZmRlZiBfX3g4Nl82NF9fCi0gICAgc3dpdGNoIChpKQotICAgICAgewotICAg
ICAgY2FzZSAwOgotCXVjcC0+dWNfbWNvbnRleHQucmN4ID0gdmFfYXJnIChhcCwgdWludHB0cl90
KTsKLQlicmVhazsKLSAgICAgIGNhc2UgMToKLQl1Y3AtPnVjX21jb250ZXh0LnJkeCA9IHZhX2Fy
ZyAoYXAsIHVpbnRwdHJfdCk7Ci0JYnJlYWs7Ci0gICAgICBjYXNlIDI6Ci0JdWNwLT51Y19tY29u
dGV4dC5yOCA9IHZhX2FyZyAoYXAsIHVpbnRwdHJfdCk7Ci0JYnJlYWs7Ci0gICAgICBjYXNlIDM6
Ci0JdWNwLT51Y19tY29udGV4dC5yOSA9IHZhX2FyZyAoYXAsIHVpbnRwdHJfdCk7Ci0JYnJlYWs7
Ci0gICAgICBkZWZhdWx0OgotCXNwW2kgKyAxXSA9IHZhX2FyZyAoYXAsIHVpbnRwdHJfdCk7Ci0J
YnJlYWs7Ci0gICAgICB9CisgICAgeworI2lmIGRlZmluZWQoX194ODZfNjRfXykKKyAgICAgIHN3
aXRjaCAoaSkKKyAgICAgICAgeworICAgICAgICBjYXNlIDA6CisgICAgICAgICAgdWNwLT51Y19t
Y29udGV4dC5yY3ggPSB2YV9hcmcgKGFwLCB1aW50cHRyX3QpOworICAgICAgICAgIGJyZWFrOwor
ICAgICAgICBjYXNlIDE6CisgICAgICAgICAgdWNwLT51Y19tY29udGV4dC5yZHggPSB2YV9hcmcg
KGFwLCB1aW50cHRyX3QpOworICAgICAgICAgIGJyZWFrOworICAgICAgICBjYXNlIDI6CisgICAg
ICAgICAgdWNwLT51Y19tY29udGV4dC5yOCA9IHZhX2FyZyAoYXAsIHVpbnRwdHJfdCk7CisgICAg
ICAgICAgYnJlYWs7CisgICAgICAgIGNhc2UgMzoKKyAgICAgICAgICB1Y3AtPnVjX21jb250ZXh0
LnI5ID0gdmFfYXJnIChhcCwgdWludHB0cl90KTsKKyAgICAgICAgICBicmVhazsKKyAgICAgICAg
ZGVmYXVsdDoKKyAgICAgICAgICAvKiBTdGFjayBhcmd1bWVudHMgc3RhcnQgYXQgc3BbaSArIDFd
IGJlY2F1c2Ugc3BbMF0gaXMgcmV0dXJuIGFkZHJlc3MgKi8KKyAgICAgICAgICBzcFtpICsgMV0g
PSB2YV9hcmcgKGFwLCB1aW50cHRyX3QpOworICAgICAgICAgIGJyZWFrOworICAgICAgICB9CisK
KyNlbGlmIGRlZmluZWQoX19hYXJjaDY0X18pCisgICAgICBzd2l0Y2ggKGkpCisgICAgICAgIHsK
KyAgICAgICAgY2FzZSAwOgorICAgICAgICAgIHVjcC0+dWNfbWNvbnRleHQueDAgPSB2YV9hcmcg
KGFwLCB1aW50cHRyX3QpOworICAgICAgICAgIGJyZWFrOworICAgICAgICBjYXNlIDE6CisgICAg
ICAgICAgdWNwLT51Y19tY29udGV4dC54MSA9IHZhX2FyZyAoYXAsIHVpbnRwdHJfdCk7CisgICAg
ICAgICAgYnJlYWs7CisgICAgICAgIGNhc2UgMjoKKyAgICAgICAgICB1Y3AtPnVjX21jb250ZXh0
LngyID0gdmFfYXJnIChhcCwgdWludHB0cl90KTsKKyAgICAgICAgICBicmVhazsKKyAgICAgICAg
Y2FzZSAzOgorICAgICAgICAgIHVjcC0+dWNfbWNvbnRleHQueDMgPSB2YV9hcmcgKGFwLCB1aW50
cHRyX3QpOworICAgICAgICAgIGJyZWFrOworICAgICAgICBjYXNlIDQ6CisgICAgICAgICAgdWNw
LT51Y19tY29udGV4dC54NCA9IHZhX2FyZyAoYXAsIHVpbnRwdHJfdCk7CisgICAgICAgICAgYnJl
YWs7CisgICAgICAgIGNhc2UgNToKKyAgICAgICAgICB1Y3AtPnVjX21jb250ZXh0Lng1ID0gdmFf
YXJnIChhcCwgdWludHB0cl90KTsKKyAgICAgICAgICBicmVhazsKKyAgICAgICAgY2FzZSA2Ogor
ICAgICAgICAgIHVjcC0+dWNfbWNvbnRleHQueDYgPSB2YV9hcmcgKGFwLCB1aW50cHRyX3QpOwor
ICAgICAgICAgIGJyZWFrOworICAgICAgICBjYXNlIDc6CisgICAgICAgICAgdWNwLT51Y19tY29u
dGV4dC54NyA9IHZhX2FyZyAoYXAsIHVpbnRwdHJfdCk7CisgICAgICAgICAgYnJlYWs7CisgICAg
ICAgIGRlZmF1bHQ6CisgICAgICAgICAgLyogU3RhY2sgYXJndW1lbnRzIGJleW9uZCB0aGUgZmly
c3QgOCByZWdpc3RlcnMuICovCisgICAgICAgICAgc3BbaSAtIDhdID0gdmFfYXJnIChhcCwgdWlu
dHB0cl90KTsKKyAgICAgICAgICBicmVhazsKKyAgICAgICAgfQogI2Vsc2UKICNlcnJvciB1bmlt
cGxlbWVudGVkIGZvciB0aGlzIHRhcmdldAogI2VuZGlmCisgICAgfQogICB2YV9lbmQgKGFwKTsK
LSAgLyogU3RvcmUgcG9pbnRlciB0byB1Y19saW5rIGF0IHRoZSB0b3Agb2YgdGhlIHN0YWNrLiAq
LworCisjaWYgZGVmaW5lZChfX3g4Nl82NF9fKQorICAvKiBTdG9yZSBwb2ludGVyIHRvIHVjX2xp
bmsgYXQgc3BbYXJnYyArIDFdLCBhZnRlciByZXR1cm4gYWRkcmVzcworICAgICBhbmQgYXJncy4g
ICovCiAgIHNwW2FyZ2MgKyAxXSA9ICh1aW50cHRyX3QpIHVjcC0+dWNfbGluazsKKworI2VsaWYg
ZGVmaW5lZChfX2FhcmNoNjRfXykKKyAgLyogU3RvcmUgcG9pbnRlciB0byB1Y19saW5rIGF0IHRo
ZSB0b3Agb2Ygb3VyIGFsbG9jYXRlZCBhcmVhLiAqLworICBzcFtzdGFja19hcmdzXSA9ICh1aW50
cHRyX3QpIHVjcC0+dWNfbGluazsKKworI2Vsc2UKKyNlcnJvciB1bmltcGxlbWVudGVkIGZvciB0
aGlzIHRhcmdldAorI2VuZGlmCisKICAgLyogTGFzdCBidXQgbm90IGxlYXN0IHNldCB0aGUgcmVn
aXN0ZXIgaW4gdGhlIGNvbnRleHQgYXQgdWNwIHNvIHRoYXQgYQogICAgICBzdWJzZXF1ZW50IHNl
dGNvbnRleHQgb3Igc3dhcGNvbnRleHQgcGlja3MgdXAgdGhlIHJpZ2h0IHZhbHVlczoKICAgICAg
LSBTZXQgaW5zdHJ1Y3Rpb24gcG9pbnRlciB0byB0aGUgdGFyZ2V0IGZ1bmN0aW9uLgogICAgICAt
IFNldCBzdGFjayBwb2ludGVyIHRvIHRoZSBqdXN0IGNvbXB1dGVkIHN0YWNrIHBvaW50ZXIgdmFs
dWUuCiAgICAgIC0gU2V0IEN5Z3dpbi1zcGVjaWZpYyB1Y2xpbmsgcmVnaXN0ZXIgdG8gdGhlIGFk
ZHJlc3Mgb2YgdGhlIHBvaW50ZXIKLSAgICAgICB0byB1Y19saW5rLiAqLworICAgICAgIHRvIHVj
X2xpbmsuCisKKyAgICAgeDg2XzY0OiB1Y2xpbmsgcmVnaXN0ZXIgaXMgcmJ4IChjYWxsZWUtc2F2
ZWQpCisgICAgIEFSTTY0OiAgdWNsaW5rIHJlZ2lzdGVyIGlzIHgxOSAoY2FsbGVlLXNhdmVkKSAq
LworCiAgIHVjcC0+dWNfbWNvbnRleHQuX01DX2luc3RQdHIgPSAodWludDY0X3QpIGZ1bmM7CiAg
IHVjcC0+dWNfbWNvbnRleHQuX01DX3N0YWNrUHRyID0gKHVpbnQ2NF90KSBzcDsKKworI2lmIGRl
ZmluZWQoX194ODZfNjRfXykKICAgdWNwLT51Y19tY29udGV4dC5fTUNfdWNsaW5rUmVnID0gKHVp
bnQ2NF90KSAoc3AgKyBhcmdjICsgMSk7CisKKyNlbGlmIGRlZmluZWQoX19hYXJjaDY0X18pCisg
IC8qIFNldCBMUiB0byBfX2NvbnRfbGlua19jb250ZXh0IGZvciBBUk02NCAodXNlZCBhcyByZXR1
cm4gYWRkcmVzcykuICovCisgIHVjcC0+dWNfbWNvbnRleHQubHIgPSAodWludDY0X3QpIF9fY29u
dF9saW5rX2NvbnRleHQ7CisgIHVjcC0+dWNfbWNvbnRleHQuX01DX3VjbGlua1JlZyA9ICh1aW50
NjRfdCkgKHNwICsgc3RhY2tfYXJncyk7CisKKyNlbHNlCisjZXJyb3IgdW5pbXBsZW1lbnRlZCBm
b3IgdGhpcyB0YXJnZXQKKyNlbmRpZgogfQotLSAKMi41MC4xLndpbmRvd3MuMQoK
--_004_PN3P287MB132037F714481EAD3C475C65F7C12PN3P287MB1320INDP_--