RE: How to handle very fast repeating interrupts?

"Chris Zimman" <[email protected]>
Newsgroups gmane.os.ecos.devel
Message-ID <[email protected]>
> I use the scheduler...

Then I'm surprised you're able to maintain the RT requirement that you need,
because it seems as that any scheduling or kernel event alone may be enough
to break it.
 
> Yes - this was my idea too. Just beginnig a pice of assembler code at
> the FIQ address. (Even without a jump because it is at the end of the
vector
> table)  Since the FIQ has 8 banked registers I fortunately do not even need
a
> stack.

> I'd like to place the ring-buffer into the fast onchip sram.
> Can I just define some symbols in the linker script for that purpose?
> Or can I tell the assembler to generate some symbols in a special section
> like
> 
> .section ".sram_data"
> _adc_buffer:
> 	.rept 64
> 	.long 0
> 	.endr
> _adc_buffer_start:
> 	.long 0
> _adc_buffer_end:
> 	.long 0

You probably don't even need to do that unless you have other external code
that needs to deal with it.
I mean this is kind of a one-off, so pretty much any solution you come up
with that's fast works here.

Can you do something like:

my_FIQ_ISR:
		[... FIQ setup ...]

		ldr 	r8_fiq, =ON_CHIP_SRAM
		ldr 	r9_fiq, =ADC_READ_ADDR
		ldr 	r10_fiq, #COUNT
1:
		ldr 	r11_fiq, [r9_fiq]
		str 	r11_fiq, [r8_fiq], #4
		sub	r10_fiq, r10_fiq, #1
		cmp 	r10_fiq, #0
		bne	1b

		[... cleanup/return ...]

--Chris
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