Re: NAND technical review
Jürgen Lambrecht <[email protected]>
| Newsgroups | gmane.os.ecos.devel |
|---|---|
| Message-ID | <[email protected]> |
Jonathan Larmour wrote:
> Jürgen Lambrecht wrote:
>
>> Rutger Hofman wrote:
>>
>>> Well, there is no way I can see into the future, but I definitely think
>>> that the wire command model for NAND chips is going to stay -- it is in
>>> ONFI, after all. Besides, all except the 1 or 2 most pioneering museum
>>> NAND chips use it too. There are chips that use a different interface,
>>> like SSD or MMC or OneNand, but then these chips come with on-chip bad
>>> block management, wear leveling of some kind, and are completely
>>> different in the way they must be handled. I'd say E's and R's
>>> implementations are concerned only with 'raw' NAND chips.
>>>
>> Correct, only for raw NAND chips to be soldered on a board. The others
>> have an embedded controller and are already packaged.
>>
>
> I don't think E's implementation would have the same problem with OneNAND
> as R's (see below). Yes it has a sort of controller, but it's not as
> advanced as an MMC or SSD one - instead it's there as logic to manage
> exchanges between its SRAM and the NAND array.
>
>
>>>> One could say that makes it a more realistic emulation. But yes I can
>>>> see disadvantages with a somewhat rigid world view. Thinking out loud, I
>>>> wonder if Rutger's layer could work with something like Samsung OneNAND.
>>>>
>>> See my comment above. The datasheet on e.g. KFM{2,4}G16Q2A says:
>>> "MuxOneNAND™‚ is a monolithic integrated circuit with a NAND Flash array
>>> using a NOR Flash interface."
>>>
>> Indeed, a oneNAND is to be threated as a NOR flash, like a pseudoSRAM is
>> a DRAM with SRAM interface.
>> And SSD has a hard disk drive interface, just like MMC and SD card; they
>> mostly have a FAT file system on them but also UFS ...
>>
>
> FAOD, I don't believe that's true. You only get a view into a small window
> of the NAND. That small window is memory mapped, but that's all. It's
> certainly not controlled like a NOR flash. It's a NAND, but not one with
> the wire command model that R's implementation assumes.
>
I'm sorry Jifl, I did not check oneNAND very well. I read a bit about it
some time ago when I was looking for a bigger NOR flash for our ARM7 board.
Jürgen
> Jifl
> --
> --["No sense being pessimistic, it wouldn't work anyway"]-- Opinions==mine
>