Accessing the AHB Master UART

"Les Miklosy [email protected] [LEON_SPARC]" <[email protected]> Thu, 04 Sep 2014 20:02:08 -0700
Newsgroups gmane.comp.hardware.opencores.leon-sparc,gmane.os.ecos.general
Message-ID <[email protected]>
Discussion Groups:

I'm writing eCos application software for a Leon3MP core synthesis. My 
board has two serial ports while the Leon3MP core design has 
instantiations for two UART's, one as slave on the APB bus the other as 
master on the AHB bus. I have a driver in assembly code for the slave 
APB bus but none for the master on the AHB bus. I could instantiate a 
second slave UART in the core design, or write a low-level driver to 
attach to the AHB UART directly.

In this design it appears the AHB UART was reserved for debug with the 
DSU, is that the case?

Q1. What is the preferred solution of the two above and Q2. Why?  My 
preference is keeping the existing core design and writing a driver in 
assembly for the UART AHB option. I've read this is a 'direct' solution 
but have not discovered how from reading the existing driver nor the 
Leon3 core design specification. Generating another Leon3MP core will be 
problematic for me although a design with two APB UARTS is likely out 
there for downloading. Thanks for guidance.

Les


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Posted by: Les Miklosy <[email protected]>
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