[Bug 1001787] GPIO Interrupt Support for Kinetis

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http://bugs.ecos.sourceware.org/show_bug.cgi?id=1001787

--- Comment #2 from Mike Jones <[email protected]> ---
Ilija,

I made and tested the following change. I can make a patch later if you agree
with it. This should allow arrays.

On Interrupt Acknowledge, I wanted an interface that took an int for port i
order to be consistent with the overall API, and with the datasheet, and with
Assertions. However, a user could use the Macro directly like this:

CYGHWR_HAL_KINETIS_PORT_PCR_ISFR_CLEAR(A, 5);

This means the user can either choose the slower and safer API, or the Macro
that already exists. I don't know if that is consistent with eCos principles or
not, but this is why I made the choice. My feeling was a newbie would see the
API and use it first. Then if they needed a little more performance, they would
discover and use the MACRO. This is consistent with my design methodology,
which is based on late optimization. However, I do recognize that embedded
community may not operate on that principle as much as large system architects,
which is my background.

Let me know what you think. I can make more changes if this is not
satisfactory.

Mike

Changes
-------

#define CYGHWR_HAL_KINETIS_PIN_CFG(__port, __bit, __irqc, __mux, __cnf) \
    ((CYGHWR_HAL_KINETIS_PORT##__port << 20) | ((__bit) << 27)        \
     | CYGHWR_HAL_KINETIS_PORT_PCR_IRQC(__irqc)                        \
     | CYGHWR_HAL_KINETIS_PORT_PCR_MUX(__mux) | (__cnf))

#define CYGHWR_HAL_KINETIS_PIN(__port, __bit, __mux, __cnf) \
        CYGHWR_HAL_KINETIS_PIN_CFG(__port, __bit, 0, __mux, __cnf)

__externC void 
hal_kinetis_gpio_setup_port(cyg_uint32 port, cyg_uint32 pin, cyg_uint8 irqc,
cyg_uint8 mux, cyg_uint8 config)
{
    CYG_ASSERT((port >= 0 && port <= 4), "GPIO ACK PORT must be 0-4");
    CYG_ASSERT((port >= 0 && port <= 31), "GPIO ACK PIN must be 0-31");
    switch(port) {
        case 0: hal_set_pin_function(CYGHWR_HAL_KINETIS_PIN_CFG(A, pin, irqc,
mux, config)); break;
        case 1: hal_set_pin_function(CYGHWR_HAL_KINETIS_PIN_CFG(B, pin, irqc,
mux, config)); break;
        case 2: hal_set_pin_function(CYGHWR_HAL_KINETIS_PIN_CFG(C, pin, irqc,
mux, config)); break;
        case 3: hal_set_pin_function(CYGHWR_HAL_KINETIS_PIN_CFG(D, pin, irqc,
mux, config)); break;
        case 4: hal_set_pin_function(CYGHWR_HAL_KINETIS_PIN_CFG(E, pin, irqc,
mux, config)); break;
        default: break;
    }
}

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