Re: Deprecate/remove riscv64sf

On 3/31/23 1:11 PM, Ruslan Bukin wrote:
> On Wed, Mar 29, 2023 at 11:17:21AM -0700, John Baldwin wrote:
>> Is anyone using riscv64sf?  All of the existing RISC-V boards include hard-float
>> support as well as QEMU.  The FPGA cores we use at Cambridge also all support
>> hard-float.  My understanding is that glibc doesn't bother supporting soft-float
>> on RV64.  If no one is using it (and has no plans to use it), then I propose
>> we drop it in 14.0 and save one more buildworld from make tinderbox.
>>
> 
> The idea behind this was to support extensibility of architecture (which is one of the key features of RISC-V). So if F,D,Q extension is not implemented, then riscv64sf could be used. It could be that those times some simulators/emulators did not support these extensions, so riscv64sf created (I could not remember).
> It could be some of new (synthesized) hardware or new emulators won't have support for this straight away. So in research&development perspective it could be useful, in real life probably not for 64 bit.

I think when riscv64sf was added we were less certain about how prevalent
floating point support would be for RISC-V.  For example, at Cambridge our MIPS
cores did not always include floating point hardware.  However, I think in
practice FP is always available for 64-bit RISC-V cores.  Even open source cores
for 64-bit RISC-V include FP support.  It's true that cores targetted at
more embedded use cases might not include FP, but I don't think FreeBSD is
targeted at those cores (nor really Linux for that matter).

-- 
John Baldwin