[Bug 297032] Intel N150: L3 cache/APIC topology warning “L3 data cache covers more APIC IDs than a package (7 > 3)”

[email protected] Fri, 24 Jul 2026 21:11:47 +0000
Newsgroups gmane.os.freebsd.bugs
Message-ID <[email protected]/bugzilla/>
https://bugs.freebsd.org/bugzilla/show_bug.cgi?id=297032

            Bug ID: 297032
           Summary: Intel N150: L3 cache/APIC topology warning “L3 data
                    cache covers more APIC IDs than a package (7 > 3)”
           Product: Base System
           Version: 15.1-RELEASE
          Hardware: amd64
                OS: Any
            Status: New
          Severity: Affects Only Me
          Priority: ---
         Component: kern
          Assignee: [email protected]
          Reporter: [email protected]

Intel N150: L3 cache/APIC topology warning “L3 data cache covers more APIC IDs
than a package (7 > 3)”

  Description:

  FreeBSD 15.1-RELEASE-p1 prints the following warning during every boot on an
Intel N150 system:

  WARNING: L3 data cache covers more APIC IDs than a package (7 > 3)

  System information
  ==================

  CPU: Intel(R) N150
  CPUID signature: 0x000b06e0
  Family: 0x6
  Model: 0xbe
  Stepping: 0
  CPUs detected: 4
  Architecture: amd64
  Mainboard: Topton X2E_N150
  Firmware: coreboot/Libreboot
  ACPI APIC table: <COREv4 COREBOOT>
  Active Intel microcode revision: 0x21
  Operating system: OPNsense 26.7.1_1
  FreeBSD version: 15.1-RELEASE-p1
  Kernel branch/build: stable/26.7-n283674-12334a596709

  The system detects all four CPUs correctly and otherwise appears stable.

  The warning was present with Intel microcode revision 0x1e and remains after
updating the active microcode to revision 0x21. Therefore, the warning does not
appear to be
  resolved by the newer microcode.

  Steps to reproduce
  ==================

  1. Boot FreeBSD on this Intel N150 system.
  2. Run:

     dmesg | grep 'L3 data cache'

  Observed result
  ===============

  The kernel prints:

  WARNING: L3 data cache covers more APIC IDs than a package (7 > 3)

  Expected result
  ===============

  FreeBSD should interpret the Intel N150 cache and APIC topology without
producing this warning, or provide a more specific diagnostic if the topology
information supplied
  by CPUID or firmware is inconsistent.

  System output
  =============

  $ uname -a
  FreeBSD hostname.example.com 15.1-RELEASE-p1 FreeBSD 15.1-RELEASE-p1
stable/26.7-n283674-12334a596709 SMP amd64

  $ freebsd-version -kru
  15.1-RELEASE-p1

  $ sysctl hw.model hw.ncpu
  hw.model: Intel(R) N150
  hw.ncpu: 4

  Relevant dmesg output:

  CPU: Intel(R) N150 (806.40-MHz K8-class CPU)
    Origin="GenuineIntel"  Id=0xb06e0  Family=0x6  Model=0xbe  Stepping=0
   
Features=0xbfebfbff<FPU,VME,DE,PSE,TSC,MSR,PAE,MCE,CX8,APIC,SEP,MTRR,PGE,MCA,CMOV,PAT,PSE36,CLFLUSH,DTS,ACPI,MMX,FXSR,SSE,SSE2,SS,HTT,TM,PBE>

   
Features2=0x7ffafbff<SSE3,PCLMULQDQ,DTES64,MON,DS_CPL,VMX,SMX,EST,TM2,SSSE3,SDBG,FMA,CX16,xTPR,PDCM,PCID,SSE4.1,SSE4.2,x2APIC,MOVBE,POPCNT,TSCDLT,AESNI,XSAVE,OSXSAVE,AV
    X,F16C,RDRAND>
  Event timer "LAPIC" quality 600
  ACPI APIC Table: <COREv4 COREBOOT>
  WARNING: L3 data cache covers more APIC IDs than a package (7 > 3)
  FreeBSD/SMP: Multiprocessor System Detected: 4 CPUs
  FreeBSD/SMP: 1 package(s) x 4 core(s)
  ioapic0 <Version 2.0> irqs 0-119

  Active microcode check:

  # cpucontrol -m 0x8b /dev/cpuctl0
  MSR 0x8b: 0x00000021 0x00000000

  Additional observations
  =======================

  FreeBSD subsequently reports the apparently correct processor topology:

  FreeBSD/SMP: Multiprocessor System Detected: 4 CPUs
  FreeBSD/SMP: 1 package(s) x 4 core(s)

  All four CPUs are available and no crash or functional failure has been
observed.

  The ACPI APIC table is supplied by coreboot. Therefore, this could be either:

  1. a FreeBSD interpretation issue involving Intel N150 deterministic
cache/APIC topology information; or
  2. inconsistent topology information supplied by coreboot/firmware.

  Source-code observation
  =======================

  The warning appears to originate from add_deterministic_cache() in
sys/x86/x86/mp_x86.c.

  The deterministic cache information appears to result in an L3 cache id_shift
of 7, while the detected package id_shift is 3. The kernel then clamps the L3
cache shift to
  the package shift.

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