Re: FreeBSD-13.0-CURRENT-arm64-aarch64-ROCKPRO64-20201210-7578a4862f0 broken ?

On Sun, 13 Dec 2020 17:33:45 +0100
Søren Schmidt <[email protected]> wrote:

> 
> 
> > On 13 Dec 2020, at 11.26, Søren Schmidt <[email protected]> wrote:
> > 
> >> On 13 Dec 2020, at 00.00, Ian Lepore <[email protected] <mailto:[email protected]>> wrote:
> >> 
> >> On Sat, 2020-12-12 at 23:53 +0100, Daniel Engberg wrote:
> >>> Hi,
> >>> 
> >>> While I haven't tried the exact version you're referring to I have a 
> >>> slightly older image that I compiled myself and it runs fine. The
> >>> only 
> >>> difference I can tell is that the memory (RAM) seems to be configure 
> >>> different on your device. I can provide a copy of the image if you
> >>> want.
> >>> 
> >>> U-Boot TPL 2020.10 (Dec 02 2020 - 23:00:31)
> >>> Channel 0: LPDDR4, 50MHz
> >>> BW=32 Col=10 Bk=8 CS0 Row=15 CS1 Row=15 CS=2 Die BW=16 Size=2048MB
> >>> Channel 1: LPDDR4, 50MHz
> >>> BW=32 Col=10 Bk=8 CS0 Row=15 CS1 Row=15 CS=2 Die BW=16 Size=2048MB
> >>> 256B stride
> >>> lpddr4_set_rate: change freq to 400000000 mhz 0, 1
> >>> lpddr4_set_rate: change freq to 800000000 mhz 1, 0
> >>> Trying to boot from BOOTROM
> >>> Returning to boot ROM...
> >>> 
> >> 
> >> That's interesting, because my first thought was "memory config
> >> problem", due to the mod-after-free "error" actually appearing to be a
> >> single-bit ram error (val=deadc0df vs deadc0de).
> >> 
> >> -- Ian
> > 
> > 
> > Yes, something fishy is going on with the memory setup?
> > From a working NetBSD boot:
> > 
> > channel 0 training pass!
> > channel 1 training pass!
> > change freq to 800MHz 1,0
> > Channel 0: LPDDR4,800MHz
> > Bus Width=32 Col=10 Bank=8 Row=16 CS=1 Die Bus-Width=16 Size=2048MB
> > Channel 1: LPDDR4,800MHz
> > Bus Width=32 Col=10 Bank=8 Row=16 CS=1 Die Bus-Width=16 Size=2048MB
> > 256B stride
> > ch 0 ddrconfig = 0x101, ddrsize = 0x40
> > ch 1 ddrconfig = 0x101, ddrsize = 0x40
> > 
> 
> Just tried to use their u-boot image to boot -current, and that works fine.
> 
> So, our port of u-boot or the official one has something borked for this combo since after 2019.10.
> 
> It is running a build world now on a NVMe stick, so lets see how that turns out? (just 4 cores the big/litte thing is still not solved it seems)..
> 
> Søren Schmidt
> [email protected] / [email protected]
> "So much code to hack, so little time"

 So,

 I have two rockpro64 here.

 The first one was sent to me by Pine when they launched the product
and the other one I received last month.
 Both are labeled as v2.1 but the first one was produced opn 2018-06-06
while the second one was on 2018-07-02
 Both works great and boot 100% of the time.

 But there is indeed some difference in the dram setup.
 Boot for the 0606 one :
U-Boot TPL 2020.10 (Dec 10 2020 - 10:13:59)
Channel 0: LPDDR4, 50MHz
BW=32 Col=10 Bk=8 CS0 Row=15 CS1 Row=15 CS=2 Die BW=16 Size=2048MB
Channel 1: LPDDR4, 50MHz
BW=32 Col=10 Bk=8 CS0 Row=15 CS1 Row=15 CS=2 Die BW=16 Size=2048MB
256B stride
lpddr4_set_rate: change freq to 400000000 mhz 0, 1
lpddr4_set_rate: change freq to 800000000 mhz 1, 0

 Boot for the 0702 one :
U-Boot TPL 2020.10 (Dec 10 2020 - 10:13:59)
Channel 0: LPDDR4, 50MHz
BW=32 Col=10 Bk=8 CS0 Row=16/15 CS=1 Die BW=16 Size=2048MB
Channel 1: LPDDR4, 50MHz
BW=32 Col=10 Bk=8 CS0 Row=16/15 CS=1 Die BW=16 Size=2048MB
256B stride
lpddr4_set_rate: change freq to 400000000 mhz 0, 1
lpddr4_set_rate: change freq to 800000000 mhz 1, 0

 Our u-boot ports doesn't do anything weird so I don't think that your
problem is related to this.
 There is a lot of debug info available in
https://github.com/u-boot/u-boot/blob/master/drivers/ram/rockchip/sdram_rk3399.c
so maybe try to compile with debug enabled and see if it logs anything
useful ?

-- 
Emmanuel Vadot <[email protected]> <[email protected]>
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