Re: device-tree on BeagleBone Black (enabling UART)

Daniel O'Connor via freebsd-arm <[email protected]>
Newsgroups gmane.os.freebsd.devel.arm
Message-ID <[email protected]>

> On 7 Feb 2021, at 10:28, Kristoff <[email protected]> wrote:
> I am running FreeBSD 12.1 on a beaglebone black. As I want to use it for a time-server (i.e. connect it to a GPS), I want to enable an additional UART (and also a pps gpio-pin, I guess).

I have done this, although my kernel is..
FreeBSD gps 13.0-CURRENT FreeBSD 13.0-CURRENT #2 41a4c010326-c262109(master)-dirty: Mon Sep  9 10:05:18 ACST 2019     [email protected]:/usr/obj/arm-src/arm.armv7/sys/GENERIC  arm

I applied some fixes which have since been committed.

> I have been trying to create a DTS-overlay file for this, but for some reason, I do not get this OK.
> 
> 
> The overlay file (see below) I use is below.
> 
> Some remarks:
> - I compile the blob with dtc, copy the file to /boot/DTB and modify /boot/loader.conf
> I guess this is correct?

I never got an overlay working so I modified am335x-boneblack.dts manually..
-- am335x-boneblack-orig.dts   2018-08-11 12:27:38.000000000 +0000
+++ am335x-boneblack.dts        2018-08-17 04:44:38.000000000 +0000
@@ -785,6 +785,17 @@
                                                pinctrl-single,pins = <0x170 0x30 0x174 0x0>;
                                                phandle = <0x4f>;
                                        };
+                                       pinmux_uart4_pins {
+                                               pinctrl-single,pins = <
+                                        0x070 0x2e      // P9_11 gpmc_wait0.uart4_rxd_mux2 -> mode 6
+                                        0x074 0x06      // P9_13 gpmc_wpn.uart4_txd_mux2 -> mode 6
+                                               >;
+                                               phandle = <0xce>;
+                                       };
+                                       pinmux_timer4_pins {
+                                               pinctrl-single,pins = < 0x90 0x22>;
+                                               phandle = <0xcf>;
+                                       };
                                        pinmux_clkout2_pin {

                                                pinctrl-single,pins = <0x1b4 0x3>;
@@ -1153,8 +1164,10 @@
                        clock-frequency = <0x2dc6c00>;
                        reg = <0x481a8000 0x2000>;
                        interrupts = <0x2d>;
-                       status = "disabled";
+                       status = "okay";
                        phandle = <0x7a>;
+                       pinctrl-names = "default";
+                       pinctrl-0 = <0xce>;
                };
                serial@481aa000 {

@@ -1525,6 +1538,9 @@
                        ti,hwmods = "timer4";
                        ti,timer-pwm;
                        phandle = <0x9f>;
+                       clocks = <0x25>;
+                       pinctrl-names = "default";
+                       pinctrl-0 = <0xce>;
                };
                timer@48046000 {

@@ -2189,6 +2205,8 @@
                hdmi_0 = "/ocp/i2c@44e0b000/tda19988/ports/port@0/endpoint@0";
                gpio1 = "/ocp/gpio@4804c000";
                uart0_pins = "/ocp/l4_wkup@44c00000/scm@210000/pinmux@800/pinmux_uart0_pins";
+               uart4_pins = "/ocp/l4_wkup@44c00000/scm@210000/pinmux@800/pinmux_uart4_pins";
+               timer4_pins = "/ocp/l4_wkup@44c00000/scm@210000/pinmux@800/pinmux_timer4_pins";
                i2c2_pins = "/ocp/l4_wkup@44c00000/scm@210000/pinmux@800/pinmux_i2c2_pins";
                pm_sram_data = "/ocp/ocmcram@40300000/pm-sram-data@1000";
                sha0_fck = "/ocp/l4_wkup@44c00000/scm@210000/scm_conf@0/clocks/sha0_fck";

(then recompile it)

If you load am335x_dmtpps.ko it then shows up as /dev/dmtpps, I then have these symlinks:
lrwxr-xr-x  1 root  wheel  5  3 Jan 04:01 /dev/gps0 -> cuau2
lrwxr-xr-x  1 root  wheel  6  3 Jan 04:01 /dev/gpspps0 -> dmtpps

And ntpd.conf has:
# NMEA on /dev/gps0 at 9600 baud, process GPGGA only (offset is time2)
# PPS on /dev/gpspps0 (offset is time1, PPS enabled by flag1)
server 127.127.20.0 mode 0x12 minpoll 4 maxpoll 4
fudge  127.127.20.0 time1 0.000 time2 0.332 flag1 1 stratum 0 refid GPS

[gps 0:08] ~ >ntpq -nc pe
     remote           refid      st t when poll reach   delay   offset  jitter
==============================================================================
o127.127.20.0    .GPS.            0 l    5   16  377    0.000    0.028   0.004

My GPS engine is a u-Blox NEO-M8T (from https://www.gnss.store/gnss-gps-modules/45-ublox-neo-m8t-time-raw-receiver-board-with-sma-rtk-ready.html)

--
Daniel O'Connor
"The nice thing about standards is that there
are so many of them to choose from."
 -- Andrew Tanenbaum

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