[Bug 258217] Kernel GICv3 ITS driver: potentially unsupported 32-bit read of 64-bit register GICR_TYPER

https://bugs.freebsd.org/bugzilla/show_bug.cgi?id=258217

            Bug ID: 258217
           Summary: Kernel GICv3 ITS driver: potentially unsupported
                    32-bit read of 64-bit register GICR_TYPER
           Product: Base System
           Version: CURRENT
          Hardware: arm64
                OS: Any
            Status: New
          Severity: Affects Only Me
          Priority: ---
         Component: arm
          Assignee: [email protected]
          Reporter: [email protected]

The kernel driver for the Interrupt Translation Service of ARM's Generic
Interrupt Controller version 3 (sys/arm64/arm64/gicv3_its.c) reads the
GICR_TYPER memory-mapped register of the redistributor in its its_init_cpu()
function:

/* Check if the ITS is enabled on this CPU */
if ((gic_r_read_4(gicv3, GICR_TYPER) & GICR_TYPER_PLPIS) == 0)
        ...

This is a 32-bit read. However, GICR_TYPER is a 64-bit register and the GICv3
specification ([1], §11.1.3) only requires that such accesses be supported on
systems with at least one core supporting Aarch32. By contrast, 64-bit reads
are always supported.

I suggest extending the read to 64 bits. By the way, the main GICv3 driver
(sys/arm64/arm64/gic_v3.c) also reads GICR_TYPER, and it does so with
bus_read_8().

This issue showed up on a software implementation of the ITS (hypervisor) that
expected a 64-bit read.

[1] https://developer.arm.com/documentation/ihi0069/latest

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