svn commit: r47580 - head/en_US.ISO8859-1/htdocs/news/status
Ed Maste <[email protected]>
| Newsgroups | gmane.os.freebsd.devel.cvs.doc |
|---|---|
| Message-ID | <[email protected]> |
Author: emaste (src committer)
Date: Fri Oct 16 00:07:38 2015
New Revision: 47580
URL: https://svnweb.freebsd.org/changeset/doc/47580
Log:
Add RISC-V report based on notes from br@
Modified:
head/en_US.ISO8859-1/htdocs/news/status/report-2015-07-2015-09.xml
Modified: head/en_US.ISO8859-1/htdocs/news/status/report-2015-07-2015-09.xml
==============================================================================
--- head/en_US.ISO8859-1/htdocs/news/status/report-2015-07-2015-09.xml Thu Oct 15 23:51:21 2015 (r47579)
+++ head/en_US.ISO8859-1/htdocs/news/status/report-2015-07-2015-09.xml Fri Oct 16 00:07:38 2015 (r47580)
@@ -1350,4 +1350,67 @@
</sponsor>
</project>
+ <project cat='arch'>
+ <title>FreeBSD/RISC-V Port</title>
+
+ <contact>
+ <person>
+ <name>
+ <given>Ruslan</given>
+ <common>Bukin</common>
+ </name>
+ <email>[email protected]</email>
+ </person>
+
+ <person>
+ <name>
+ <given>Arun</given>
+ <common>Thomas</common>
+ </name>
+ <email>[email protected]</email>
+ </person>
+
+ <person>
+ <name>
+ <given>Ed</given>
+ <common>Maste</common>
+ </name>
+ <email>[email protected]</email>
+ </person>
+ </contact>
+
+ <links>
+ <url href="https://wiki.freebsd.org/riscv">FreeBSD
+ wiki RISC-V</url>
+ <url href="https://people.freebsd.org/~br/riscv-singleuser.txt">Single
+ user boot log</url>
+ </links>
+
+ <body>
+ <p>RISC-V is an open source Instruction Set Architecture (ISA)
+ designed at UC Berkeley. It is freely available for all uses
+ without requiring fees or license agreements.
+ The RISC-V team intends to provide freely available
+ BSD licensed CPU designs.</p>
+
+ <p>&a.br; (University of Cambridge) now has &os; booting
+ to a single user shell on a RISC-V simulator.
+ The porting effort started only two months ago
+ and is very much a work in progress, requiring significant
+ refactoring and clean up before it reaches a committable
+ state. Nonetheless this is exceptional progress in a short
+ time. The porting effort also identified a number of
+ proposed ISA improvements.</p>
+
+ <p>The port currently uses the GNU tool chain (GCC and
+ binutils), and runs on the Spike simulator. Improved RISC-V
+ support in Clang/LLVM and related tools is highly desired.</p>
+ </body>
+
+ <sponsor>
+ DARPA, AFRL
+ </sponsor>
+ </project>
+
+
</report>
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