git: 04f8a6aeeba5 - main - pci: Add L1 PM definitions
Kevin Bowling <[email protected]> Fri, 31 Jul 2026 09:43:49 +0000
| Newsgroups | gmane.os.freebsd.devel.cvs.src |
|---|---|
| Message-ID | <6a6c6e55.33ba7.6f77a014__40817.1815493674$1785491072$gmane$org@gitrepo.freebsd.org> |
The branch main has been updated by kbowling: URL: https://cgit.FreeBSD.org/src/commit/?id=04f8a6aeeba5cbaa48be7134765ee49d5b1b9857 commit 04f8a6aeeba5cbaa48be7134765ee49d5b1b9857 Author: Michael Adler <[email protected]> AuthorDate: 2026-07-09 17:00:32 +0000 Commit: Kevin Bowling <[email protected]> CommitDate: 2026-07-31 09:29:32 +0000 pci: Add L1 PM definitions Add register/bit definitions for the L1 PM substates capability (PCIZ_L1PM) to pcireg.h. Signed-off-by: Michael Adler <[email protected]> MFC after: 1 week Pull-Request: https://github.com/freebsd/freebsd-src/pull/2318 --- sys/dev/pci/pcireg.h | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/sys/dev/pci/pcireg.h b/sys/dev/pci/pcireg.h index 3ec7879b8a09..5faaf3d7c793 100644 --- a/sys/dev/pci/pcireg.h +++ b/sys/dev/pci/pcireg.h @@ -1129,6 +1129,20 @@ #define PCIM_ACS_UNCLAIMED_REQ_REDIRECT_CTL 0x1000 #define PCIR_ACS_EGRESS_CONTROL_VECTOR 0x8 +/* L1 PM Substates definitions */ +#define PCIR_L1PM_CAP 0x04 +#define PCIM_L1PM_CAP_PCIPM_L1_2 0x00000001 +#define PCIM_L1PM_CAP_PCIPM_L1_1 0x00000002 +#define PCIM_L1PM_CAP_ASPM_L1_2 0x00000004 +#define PCIM_L1PM_CAP_ASPM_L1_1 0x00000008 +#define PCIM_L1PM_CAP_L1PM_SUBSTATES 0x00000010 +#define PCIR_L1PM_CTL1 0x08 +#define PCIM_L1PM_CTL1_PCIPM_L1_2 0x00000001 +#define PCIM_L1PM_CTL1_PCIPM_L1_1 0x00000002 +#define PCIM_L1PM_CTL1_ASPM_L1_2 0x00000004 +#define PCIM_L1PM_CTL1_ASPM_L1_1 0x00000008 +#define PCIR_L1PM_CTL2 0x0c + /* * AMD IOMMU Base Capability * From AMD I/O Virtualization Technology (IOMMU) Specification