git: c276a80a4e52 - main - e1000: Check PHY control register reads
Kevin Bowling <[email protected]>
| Newsgroups | gmane.os.freebsd.devel.cvs.src |
|---|---|
| Message-ID | <6a7b8a71.3700e.7bdda8b__35954.1492931143$1786481287$gmane$org@gitrepo.freebsd.org> |
The branch main has been updated by kbowling: URL: https://cgit.FreeBSD.org/src/commit/?id=c276a80a4e52c065ed631e498ed2c3d284b45c75 commit c276a80a4e52c065ed631e498ed2c3d284b45c75 Author: Kevin Bowling <[email protected]> AuthorDate: 2026-08-11 16:19:25 +0000 Commit: Kevin Bowling <[email protected]> CommitDate: 2026-08-11 20:47:26 +0000 e1000: Check PHY control register reads Do not modify a zero-initialized PHY control value when its preceding read failed. MFC after: 2 weeks --- sys/dev/e1000/e1000_phy.c | 20 +++++++++++++++++--- 1 file changed, 17 insertions(+), 3 deletions(-) diff --git a/sys/dev/e1000/e1000_phy.c b/sys/dev/e1000/e1000_phy.c index e3c8383d012e..8b00a80337a1 100644 --- a/sys/dev/e1000/e1000_phy.c +++ b/sys/dev/e1000/e1000_phy.c @@ -3541,10 +3541,15 @@ static s32 e1000_access_phy_wakeup_reg_bm(struct e1000_hw *hw, u32 offset, **/ void e1000_power_up_phy_copper(struct e1000_hw *hw) { + s32 ret_val; u16 mii_reg = 0; /* The PHY will retain its settings across a power down/up cycle */ - hw->phy.ops.read_reg(hw, PHY_CONTROL, &mii_reg); + ret_val = hw->phy.ops.read_reg(hw, PHY_CONTROL, &mii_reg); + if (ret_val) { + DEBUGOUT("Error reading PHY control register\n"); + return; + } mii_reg &= ~MII_CR_POWER_DOWN; hw->phy.ops.write_reg(hw, PHY_CONTROL, mii_reg); } @@ -3559,10 +3564,15 @@ void e1000_power_up_phy_copper(struct e1000_hw *hw) **/ void e1000_power_down_phy_copper(struct e1000_hw *hw) { + s32 ret_val; u16 mii_reg = 0; /* The PHY will retain its settings across a power down/up cycle */ - hw->phy.ops.read_reg(hw, PHY_CONTROL, &mii_reg); + ret_val = hw->phy.ops.read_reg(hw, PHY_CONTROL, &mii_reg); + if (ret_val) { + DEBUGOUT("Error reading PHY control register\n"); + return; + } mii_reg |= MII_CR_POWER_DOWN; hw->phy.ops.write_reg(hw, PHY_CONTROL, mii_reg); msec_delay(1); @@ -3889,7 +3899,11 @@ s32 e1000_link_stall_workaround_hv(struct e1000_hw *hw) return E1000_SUCCESS; /* Do not apply workaround if in PHY loopback bit 14 set */ - hw->phy.ops.read_reg(hw, PHY_CONTROL, &data); + ret_val = hw->phy.ops.read_reg(hw, PHY_CONTROL, &data); + if (ret_val) { + DEBUGOUT("Error reading PHY control register\n"); + return ret_val; + } if (data & PHY_CONTROL_LB) return E1000_SUCCESS;