git: cafdeed9d5d8 - stable/15 - pci: Ignore SR-IOV VFs when tuning MPS

The branch stable/15 has been updated by kbowling:

URL: https://cgit.FreeBSD.org/src/commit/?id=cafdeed9d5d8fc3ac2a9172dc904f3c98df29280

commit cafdeed9d5d8fc3ac2a9172dc904f3c98df29280
Author:     Kevin Bowling <[email protected]>
AuthorDate: 2026-08-06 06:39:20 +0000
Commit:     Kevin Bowling <[email protected]>
CommitDate: 2026-08-16 20:46:10 +0000

    pci: Ignore SR-IOV VFs when tuning MPS
    
    The VF Device Control MPS and MRRS fields are reserved and preserved.
    VF transactions use the PF MPS, so a hardwired VF value must not be
    used to retune the shared PCIe hierarchy.
    
    Document the previously undocumented tuning knob and clarify why a VF
    may continue to display its reserved hardwired value.
    
    This fixes an instant crash/reboot on my Zen3 system with 82599 VFs.
    
    (cherry picked from commit 5aab6164161db397d84e5fff88e1af1a9e405875)
---
 share/man/man4/pci.4 | 13 ++++++++++++-
 sys/dev/pci/pci.c    |  7 +++++++
 2 files changed, 19 insertions(+), 1 deletion(-)

diff --git a/share/man/man4/pci.4 b/share/man/man4/pci.4
index 38a427e64f4f..71ca2f50ed90 100644
--- a/share/man/man4/pci.4
+++ b/share/man/man4/pci.4
@@ -22,7 +22,7 @@
 .\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
 .\" SUCH DAMAGE.
 .\"
-.Dd March 10, 2026
+.Dd August 6, 2026
 .Dt PCI 4
 .Os
 .Sh NAME
@@ -589,6 +589,17 @@ MSI interrupts can be disabled by setting this tunable to 0.
 Enable support for extended Message Signalled Interrupts
 .Pq MSI-X .
 MSI-X interrupts can be disabled by setting this tunable to 0.
+.It Va hw.pci.enable_mps_tune Pq Defaults to 1
+Configure PCI-express Maximum Payload Size
+.Pq MPS
+during device enumeration.
+SR-IOV Virtual Functions are excluded because their MPS fields are reserved
+and the Physical Function setting applies to them.
+Configuration-space tools may therefore display a Virtual Function's
+hardwired reserved value rather than the effective Physical Function MPS.
+Maximum Read Request Size
+.Pq MRRS
+is not modified by this tuner.
 .It Va hw.pci.enable_pcie_ei Pq Defaults to 0
 Enable support for PCI-express Electromechanical Interlock.
 .It Va hw.pci.enable_pcie_hp Pq Defaults to 1
diff --git a/sys/dev/pci/pci.c b/sys/dev/pci/pci.c
index 2a43fa10b7e0..5adae09cf737 100644
--- a/sys/dev/pci/pci.c
+++ b/sys/dev/pci/pci.c
@@ -4421,6 +4421,13 @@ pcie_setup_mps(device_t dev)
 	device_t root;
 	uint16_t rmps, mmps, mps;
 
+	/*
+	 * PCIe r4.0, sec 9.3.5.4 defines the VF MPS and MRRS fields as
+	 * Reserved and Preserved, with the PF settings applying to the VF.
+	 * Do not use the VF's hardwired value to configure the shared path.
+	 */
+	if ((dinfo->cfg.flags & PCICFG_VF) != 0)
+		return;
 	if (dinfo->cfg.pcie.pcie_location == 0)
 		return;
 	root = pci_find_pcie_root_port(dev);