git: 7ee086b95dce - stable/14 - e1000: Disable autonomous PCH power gating after reset
Kevin Bowling <[email protected]>
| Newsgroups | gmane.os.freebsd.devel.cvs.src |
|---|---|
| Message-ID | <6a83b601.1919f.1419590f__32012.8346372925$1787016731$gmane$org@gitrepo.freebsd.org> |
The branch stable/14 has been updated by kbowling: URL: https://cgit.FreeBSD.org/src/commit/?id=7ee086b95dce6913b8b76f887ed6deb337c401ae commit 7ee086b95dce6913b8b76f887ed6deb337c401ae Author: Kevin Bowling <[email protected]> AuthorDate: 2026-08-11 15:23:51 +0000 Commit: Kevin Bowling <[email protected]> CommitDate: 2026-08-18 01:31:29 +0000 e1000: Disable autonomous PCH power gating after reset Panther Point changed the reset value of CTRL_EXT.DPG_EN to enable autonomous power gating. Clear it after hardware reset on Panther Point and Nova Point controllers to prevent unexpected Tx/Rx hangs, packet loss, or corruption. (cherry picked from commit 0979b0430c2d728e595841ecba30b63972794fe9) --- sys/dev/e1000/e1000_defines.h | 1 + sys/dev/e1000/e1000_ich8lan.c | 8 ++++++++ 2 files changed, 9 insertions(+) diff --git a/sys/dev/e1000/e1000_defines.h b/sys/dev/e1000/e1000_defines.h index f1b1008764a1..9b8aca173856 100644 --- a/sys/dev/e1000/e1000_defines.h +++ b/sys/dev/e1000/e1000_defines.h @@ -66,6 +66,7 @@ /* Extended Device Control */ #define E1000_CTRL_EXT_LPCD 0x00000004 /* LCD Power Cycle Done */ +#define E1000_CTRL_EXT_DPG_EN 0x00000008 /* Dynamic Power Gating */ #define E1000_CTRL_EXT_SDP4_DATA 0x00000010 /* SW Definable Pin 4 data */ #define E1000_CTRL_EXT_SDP6_DATA 0x00000040 /* SW Definable Pin 6 data */ #define E1000_CTRL_EXT_SDP3_DATA 0x00000080 /* SW Definable Pin 3 data */ diff --git a/sys/dev/e1000/e1000_ich8lan.c b/sys/dev/e1000/e1000_ich8lan.c index 3102505faa15..f1a5fe59bb81 100644 --- a/sys/dev/e1000/e1000_ich8lan.c +++ b/sys/dev/e1000/e1000_ich8lan.c @@ -5094,6 +5094,14 @@ static s32 e1000_reset_hw_ich8lan(struct e1000_hw *hw) reg |= E1000_KABGTXD_BGSQLBIAS; E1000_WRITE_REG(hw, E1000_KABGTXD, reg); + /* Prevent autonomous power gating after the hardware reset. */ + if (hw->mac.type >= e1000_pch_ptp && + hw->mac.type < e1000_82575) { + reg = E1000_READ_REG(hw, E1000_CTRL_EXT); + reg &= ~E1000_CTRL_EXT_DPG_EN; + E1000_WRITE_REG(hw, E1000_CTRL_EXT, reg); + } + return E1000_SUCCESS; }