git: 3ff56f81a1a5 - main - intelspi: add Tiger Lake SPI controller IDs

Adrian Chadd <[email protected]>
Newsgroups gmane.os.freebsd.devel.cvs.src
Message-ID <6a890cc5.3a03f.4cc8312b__1679.02004193223$1787366637$gmane$org@gitrepo.freebsd.org>
The branch main has been updated by adrian:

URL: https://cgit.FreeBSD.org/src/commit/?id=3ff56f81a1a58d708d0101d601e88c289cfc5882

commit 3ff56f81a1a58d708d0101d601e88c289cfc5882
Author:     Abdelkader Boudih <[email protected]>
AuthorDate: 2026-08-22 02:25:39 +0000
Commit:     Adrian Chadd <[email protected]>
CommitDate: 2026-08-22 02:25:46 +0000

    intelspi: add Tiger Lake SPI controller IDs
    
    Add PCI device IDs for Tiger Lake-generation LPSS peripheral SPI
    controllers.
    
    Reviewed by:    adrian
    Differential Revision:  https://reviews.freebsd.org/D59004
---
 sys/dev/intel/spi_pci.c | 11 +++++++++++
 1 file changed, 11 insertions(+)

diff --git a/sys/dev/intel/spi_pci.c b/sys/dev/intel/spi_pci.c
index 076d33d46e99..1bb54087f298 100644
--- a/sys/dev/intel/spi_pci.c
+++ b/sys/dev/intel/spi_pci.c
@@ -64,6 +64,10 @@ static struct intelspi_pci_device {
 	{ 0x34aa8086, SPI_SUNRISEPOINT, "Intel Ice Lake SPI Controller-0" },
 	{ 0x34ab8086, SPI_SUNRISEPOINT, "Intel Ice Lake SPI Controller-1" },
 	{ 0x34fb8086, SPI_SUNRISEPOINT, "Intel Ice Lake SPI Controller-2" },
+	{ 0x43aa8086, SPI_SUNRISEPOINT, "Intel Tiger Lake SPI Controller-0" },
+	{ 0x43ab8086, SPI_SUNRISEPOINT, "Intel Tiger Lake SPI Controller-1" },
+	{ 0x43fb8086, SPI_SUNRISEPOINT, "Intel Tiger Lake SPI Controller-2" },
+	{ 0x43fd8086, SPI_SUNRISEPOINT, "Intel Tiger Lake SPI Controller-3" },
 	{ 0x4daa8086, SPI_SUNRISEPOINT, "Intel Jasper Lake SPI Controller-0" },
 	{ 0x4dab8086, SPI_SUNRISEPOINT, "Intel Jasper Lake SPI Controller-1" },
 	{ 0x4dfb8086, SPI_SUNRISEPOINT, "Intel Jasper Lake SPI Controller-2" },
@@ -80,6 +84,13 @@ static struct intelspi_pci_device {
 	{ 0x9daa8086, SPI_SUNRISEPOINT, "Intel Cannon Lake SPI Controller-0" },
 	{ 0x9dab8086, SPI_SUNRISEPOINT, "Intel Cannon Lake SPI Controller-1" },
 	{ 0x9dfb8086, SPI_SUNRISEPOINT, "Intel Cannon Lake SPI Controller-2" },
+	{ 0xa0aa8086, SPI_SUNRISEPOINT, "Intel Tiger Lake SPI Controller-4" },
+	{ 0xa0ab8086, SPI_SUNRISEPOINT, "Intel Tiger Lake SPI Controller-5" },
+	{ 0xa0de8086, SPI_SUNRISEPOINT, "Intel Tiger Lake SPI Controller-6" },
+	{ 0xa0df8086, SPI_SUNRISEPOINT, "Intel Tiger Lake SPI Controller-7" },
+	{ 0xa0fb8086, SPI_SUNRISEPOINT, "Intel Tiger Lake SPI Controller-8" },
+	{ 0xa0fd8086, SPI_SUNRISEPOINT, "Intel Tiger Lake SPI Controller-9" },
+	{ 0xa0fe8086, SPI_SUNRISEPOINT, "Intel Tiger Lake SPI Controller-10" },
 	{ 0xa1298086, SPI_SUNRISEPOINT, "Intel Sunrise Point-H SPI Controller-0" },
 	{ 0xa12a8086, SPI_SUNRISEPOINT, "Intel Sunrise Point-H SPI Controller-1" },
 	{ 0xa2a98086, SPI_SUNRISEPOINT, "Intel Kaby Lake-H SPI Controller-0" },
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