Re: ISDN4BSD (HPS version) is going into ports
Hans Petter Selasky <[email protected]> Sun, 2 Dec 2012 10:43:53 +0100
| Newsgroups | gmane.os.freebsd.devel.isdn |
|---|---|
| Message-ID | <[email protected]> |
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On Sunday 02 December 2012 00:07:36 Andreas Longwitz wrote:
> Hi,
>
> >> First step of analyze is done: I see in the isdntrace that several of
> >>
> >> the incoming D-channel frames have an extra byte at the end of the frame:
> >> 10101110 UNKNOWN single octet IE = 0xae
> >>
> >> Further I see many single outgoing bytes on L3 level:
> >> L3 04 AE 10101110 Protocol = Other Layer 3 or X.25 (0xae)
>
> I have to correct myself: Further I see many single incoming (not
> outgoing) bytes. In the meantime I am convinced that every incoming L2
> frame from the card has exactly one superfluos byte at the end.
>
> >> On the other side of the ISDN-line all length are correct. Maybe there
> >> is a "one byte length problem" in the D-channel communication between
> >> the i4b driver and the card.
> >
> > Maybe you can read out the chip numbers? Maybe some of the chips used are
> > documented. Should not be impossible to get this working!
>
> Would be fine! The driver working in FreeBSD 6 gives ifpi2-0: ISACSX
> PSB3186, but this is hardcoded in the source. On the chip I can read
> "AVM PSB 3100 F".
>
> > Should be easy to compare with the old driver from FreeBSD 6.x.
>
> In the meantime I was able to do a verbose boot. Sounds strange, but
> there was a another problem solved by Andriy Gapon:
> lists.freebsd.org/pipermail/freebsd-stable/2012-November/070634.html.
>
> During verbose boot i4b gives for my AVM Fritz!Card version 2 PCI card:
>
> i4b-L1 ihfc1: ihfc_pnp_probe_sub: this unit has 6 transmit and
> receive channels and 1 sub-controllers
> i4b-L1 ihfc1: ihfc_alloc_all_resources: Internal IRQ-address: 0x17
> ihfc1: Reserved 0x20 bytes for rid 0x10 type 3 at 0xfb145000
> i4b-L1 ihfc1: ihfc_fifo_setup_soft: HFC_MAX_FRAMES >= f->fm.h.Fsize
> i4b-L1 ihfc1: avm_pci_chip_status_read: status=0x48
> i4b-L1 ihfc1: avm_pci_b_status_read: b_status=0x20
> i4b-L1 ihfc1: avm_pci_b_status_read: b_status=0x00
> i4b-L1 ihfc1: __ihfc_chip_interrupt: del=00000014 ista=0x0000,
> exir=0x0000, h_ista=0x0000, h_exir=0x0000, s_int_s1=0x00
> i4b-L1 ihfc1: ihfc_fsm_update: Undefined state: 1!. (p0,a0,c0,u0,d0,i1)
> ihfc1: <AVM Fritz!Card version 2 PCI> port 0x54c0-0x54df mem
> 0xfb145000-0xfb14501f irq 23 at device 7.0 on pci0
> i4b-L1 ihfc1: ihfc_post_setup: Setting up IRQ
> ihfc1: [MPSAFE]
> ihfc1: [ITHREAD]
> ihfc1: Attaching I4B controller 0.
> i4b-L1 ihfc1: ihfc_B_get_fifo_translator:
> ihfc1: Creating /dev/ihfc0.X.
> i4b-L1 ihfc1: avm_pci_chip_status_read: status=0x49
> i4b-L1 ihfc1: avm_pci_chip_status_read: ista=0x11
> i4b-L1 ihfc1: avm_pci_chip_status_read: ista_d=0x90
> i4b-L1 ihfc1: ihfc_fsm_update: Activate indication (priority=8/9).
> (p0,a1,c1,u0,d0,i0)
> i4b-L1 ihfc1: fsm_write: Start activation, cmd[0]=0x20
> i4b-L1 ihfc1: avm_pci_b_status_read: b_status=0x00
> i4b-L1 ihfc1: avm_pci_b_status_read: b_status=0x00
> i4b-L1 ihfc1: __ihfc_chip_interrupt: del=00000010 ista=0x0000,
> exir=0x0000, h_ista=0x0000, h_exir=0x0000, s_int_s1=0x00
>
> Maybe the "Undefined state" message in ihfc_fsm_update gives a hint ?
>
> P.S.
> With bootverbose in function ihfc_pnp_probe_sub() the debugbit
> L1_HFC_DBG is set producing very very lot of messages and the system
> comes to complete congestion, therefore after a few minutes my watchdog
> triggers, If you think this not ok, then I can give more details. At the
> moment I avoid this problem reliable with "isdndebug -d" as soon as
> userland gets control after verbose boot.
Hi,
The warning can be ignored I think.
I see that my driver differs a bit from the origin. That's basically my fault,
when I did the porting, I tried to make things simpler. Maybe I have to port
more stuff from the working one. Mostly it requires some 32-bit register magic
instead of 8-bit register access. I'm using transparent mode only for B-
channels, and have optimised away some programming in that regard.
http://cvsweb.netbsd.org/bsdweb.cgi/src/sys/dev/pci/ifpci2.c?annotate=1.19.22.1
Can you try the attached patch?
--HPS
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Index: src/sys/i4b/layer1/ihfc3/i4b_avm_pci.h
===================================================================
--- src/sys/i4b/layer1/ihfc3/i4b_avm_pci.h (revision 2511)
+++ src/sys/i4b/layer1/ihfc3/i4b_avm_pci.h (working copy)
@@ -113,9 +113,19 @@
if(reg & 0x80)
{
+ enum { BUFFER_SIZE = 64 };
+ u_int32_t buffer[BUFFER_SIZE];
+ IHFC_LEN_T x;
+
+ if (len > BUFFER_SIZE)
+ len = BUFFER_SIZE; /* should not happen */
+
/* ISAC-SX REGISTER */
bus_space_write_4(t, h, REG_ISACSX_INDEX, (reg & 0x7F));
- bus_space_read_multi_1(t, h, REG_ISACSX_DATA, ptr, len);
+ bus_space_read_multi_4(t, h, REG_ISACSX_DATA, buffer, len);
+
+ for (x = 0; x != len; x++)
+ ptr[x] = (u_int8_t)buffer[x];
}
else
{
@@ -148,9 +158,19 @@
if(reg & 0x80)
{
+ enum { BUFFER_SIZE = 64 };
+ u_int32_t buffer[BUFFER_SIZE];
+ IHFC_LEN_T x;
+
+ if (len > BUFFER_SIZE)
+ len = BUFFER_SIZE; /* should not happen */
+
+ for (x = 0; x != len; x++)
+ buffer[x] = ptr[x];
+
/* ISAC-SX REGISTER */
bus_space_write_4(t, h, REG_ISACSX_INDEX, (reg & 0x7F));
- bus_space_write_multi_1(t, h, REG_ISACSX_DATA, ptr, len);
+ bus_space_write_multi_4(t, h, REG_ISACSX_DATA, buffer, len);
}
else
{
@@ -215,7 +235,8 @@
{
IPAC_BUS_VAR(sc);
- u_int8_t buffer[0x40 + 0x10]; /* allocate a buffer on the stack */
+ /* allocate a buffer on the stack */
+ u_int32_t buffer[(0x40 + 0x10) / 4];
u_int8_t temp;
/* read status */
@@ -257,9 +278,9 @@
/* read FIFO */
bus_space_read_multi_4(t, h, offset + HSCX_FIFO,
- (void *)&buffer[0], (temp+3)/4);
+ buffer, (temp + 3) / 4);
- (f+receive)->Z_ptr = &buffer[0];
+ (f+receive)->Z_ptr = (uint8_t *)buffer;
(f+receive)->Z_chip = temp;
/* call filter */
@@ -279,7 +300,7 @@
temp = 32;
(f+transmit)->i_ista &= ~(I_ISTA_ERR|I_ISTA_XPR);
- (f+transmit)->Z_ptr = &buffer[0];
+ (f+transmit)->Z_ptr = (uint8_t *)buffer;
(f+transmit)->Z_chip = temp;
/* call filter */
@@ -299,9 +320,16 @@
/* update state */
(f+transmit)->state &= ~(ST_FRAME_ERROR|ST_FRAME_END);
+ /* write FIFO length */
+ bus_space_write_1(t, h, offset + HSCX_LEN, 0);
+
+ /* write FIFO command */
+ bus_space_write_1(t, h, offset + HSCX_STAT,
+ HSCX_CMD_XME);
+
/* write FIFO */
bus_space_write_multi_4(t, h, offset + HSCX_FIFO,
- (void *)&buffer[0], (temp+3)/4);
+ buffer, (temp + 3) / 4);
}
return;
}
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