Regarding spurious IR7 Interrupts

Intel 386 EX
Embedded Microprocessor
User's Manual
Order Number 272485-002

Says:

9.4.3 Spurious Interrupts

For both edge and level-triggered interrupts, a high level must be
maintained on the IR line until
after the falling edge of the first INTA# pulse (see Figure 9-18). A
spurious interrupt request is
generated if this stipulation is not met.  A spurious interrupt on any IR
line generates the same
vector number as an IR7 request. The spurious interrupt, however, does not
set the in-service bit for
IR7. Therefore, an IR7 interrupt service routine must check the in-service
register to determine
whether the interrupt source was a valid IR7 (the in-service bit is set) or
a spurious interrupt (the
in-service bit is cleared).

Respectfully,

Douglas W. Goodall


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