Synopsis: L2 cache associativity not decoded properly on VIA/Zhaoxin CPUs, panic on Zhaoxin KX-7000
Responsible-Changed-From-To: port-amd64-maintainer->andvar
Responsible-Changed-By: [email protected]
Responsible-Changed-When: Tue, 25 Aug 2026 21:04:46 +0000
Responsible-Changed-Why:
take
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