CVS commit: src/sys/arch/m68k

"Jason R Thorpe" <[email protected]>
Newsgroups gmane.os.netbsd.devel.cvs
Message-ID <[email protected]> 
Module Name:	src
Committed By:	thorpej
Date:		Sun Mar 29 20:56:00 UTC 2026

Modified Files:
	src/sys/arch/m68k/include: cacheops.h
	src/sys/arch/m68k/m68k: cacheops.c

Log Message:
We should not be intermingling ATC/TLB and I/D cache operations, but
for now ensure that the TBI*() functions are only made available for
Moto and/or HP MMU configurations.


To generate a diff of this commit:
cvs rdiff -u -r1.16 -r1.17 src/sys/arch/m68k/include/cacheops.h
cvs rdiff -u -r1.15 -r1.16 src/sys/arch/m68k/m68k/cacheops.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
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