CVS commit: src/sys

Module Name:	src
Committed By:	tls
Date:		Mon Mar 30 16:43:45 UTC 2026

Modified Files:
	src/sys/arch/evbmips/malta: machdep.c malta_bus_io.c malta_bus_mem.c
	    malta_intr.c
	src/sys/arch/evbmips/malta/dev: gt.c mainbus.c
	src/sys/arch/evbmips/malta/pci: pcib.c
	src/sys/dev/ic: wdc.c wdcvar.h
	src/sys/dev/pci: artsata.c pciide_common.c svwsata.c

Log Message:
Trying again to avoid that 3-second delay on PCI IDE controllers.
This time, the change is conditionalized so it won't hit old-style wdc.


To generate a diff of this commit:
cvs rdiff -u -r1.48 -r1.49 src/sys/arch/evbmips/malta/machdep.c
cvs rdiff -u -r1.6 -r1.7 src/sys/arch/evbmips/malta/malta_bus_io.c
cvs rdiff -u -r1.7 -r1.8 src/sys/arch/evbmips/malta/malta_bus_mem.c
cvs rdiff -u -r1.27 -r1.28 src/sys/arch/evbmips/malta/malta_intr.c
cvs rdiff -u -r1.17 -r1.18 src/sys/arch/evbmips/malta/dev/gt.c
cvs rdiff -u -r1.18 -r1.19 src/sys/arch/evbmips/malta/dev/mainbus.c
cvs rdiff -u -r1.26 -r1.27 src/sys/arch/evbmips/malta/pci/pcib.c
cvs rdiff -u -r1.312 -r1.313 src/sys/dev/ic/wdc.c
cvs rdiff -u -r1.100 -r1.101 src/sys/dev/ic/wdcvar.h
cvs rdiff -u -r1.30 -r1.31 src/sys/dev/pci/artsata.c
cvs rdiff -u -r1.73 -r1.74 src/sys/dev/pci/pciide_common.c
cvs rdiff -u -r1.24 -r1.25 src/sys/dev/pci/svwsata.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.