CVS commit: [netbsd-11] src/sys/arch/riscv
"Martin Husemann" <[email protected]>
| Newsgroups | gmane.os.netbsd.devel.cvs |
|---|---|
| Message-ID | <[email protected]> |
Module Name: src Committed By: martin Date: Thu Apr 2 18:13:22 UTC 2026 Modified Files: src/sys/arch/riscv/conf [netbsd-11]: files.riscv src/sys/arch/riscv/include [netbsd-11]: cpufunc.h pmap.h src/sys/arch/riscv/riscv [netbsd-11]: cpu.c pmap_machdep.c riscv_machdep.c Added Files: src/sys/arch/riscv/riscv [netbsd-11]: cpufunc.c Log Message: Pull up following revision(s) (requested by skrll in ticket #221): sys/arch/riscv/riscv/cpufunc.c: revision 1.1 sys/arch/riscv/riscv/cpufunc.c: revision 1.2 sys/arch/riscv/conf/files.riscv: revision 1.18 sys/arch/riscv/include/pmap.h: revision 1.26 sys/arch/riscv/include/cpufunc.h: revision 1.2 sys/arch/riscv/riscv/pmap_machdep.c: revision 1.24 sys/arch/riscv/riscv/cpu.c: revision 1.11 sys/arch/riscv/riscv/riscv_machdep.c: revision 1.48 risc-v: handle T-Head L1 caches Provide and use hooks for L1 cache operations on the T-Head processors. Re-worked from diffs provided by Rui-Xiang Guo via port-riscv. Fix primary cache function prototypes to fix build on rv32 To generate a diff of this commit: cvs rdiff -u -r1.17 -r1.17.2.1 src/sys/arch/riscv/conf/files.riscv cvs rdiff -u -r1.1 -r1.1.8.1 src/sys/arch/riscv/include/cpufunc.h cvs rdiff -u -r1.24.2.1 -r1.24.2.2 src/sys/arch/riscv/include/pmap.h cvs rdiff -u -r1.7.2.2 -r1.7.2.3 src/sys/arch/riscv/riscv/cpu.c cvs rdiff -u -r0 -r1.3.2.2 src/sys/arch/riscv/riscv/cpufunc.c cvs rdiff -u -r1.21.2.1 -r1.21.2.2 src/sys/arch/riscv/riscv/pmap_machdep.c cvs rdiff -u -r1.43.2.1 -r1.43.2.2 src/sys/arch/riscv/riscv/riscv_machdep.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.