CVS commit: [netbsd-10] src
"Martin Husemann" <[email protected]>
| Newsgroups | gmane.os.netbsd.devel.cvs |
|---|---|
| Message-ID | <[email protected]> |
Module Name: src Committed By: martin Date: Thu Aug 27 17:11:27 UTC 2026 Modified Files: src/sys/arch/x86/x86 [netbsd-10]: identcpu.c src/usr.sbin/cpuctl/arch [netbsd-10]: i386.c Log Message: Pull up following revision(s) (requested by andvar in ticket #1334): sys/arch/x86/x86/identcpu.c: revision 1.142 usr.sbin/cpuctl/arch/i386.c: revision 1.149 Decode L2 cache associativity for VIA CPUs using the AMD cache lookup table for the 0x80000006 CPUID function associativity value. Use `cpuid leaf 4' to get cache parameters for Zhaoxin and late VIA CPU models. VIA datasheets mention that associativity is stored as a decimal value. However, in practice, it is encoded the AMD way and does not store the actual value. Using the raw value leads to an incorrect CPU colors calculation, causing a panic on KX-7000 (since the result is not a power of two) and incorrect CPU colors values on other CPU models (e.g. as visible in `vmstat -s'). Decoding value using the AMD cache lookup table produces correct values in all cases I have tested or verified using CPUID dumps available online. Additionally, Zhaoxin and late VIA CPUs (CNQ and newer) prefer the Intel `cpuid leaf 4' function to get cache parameters. Check whether cpuid_level is equal to or greater than 4 to identify these CPUs and override cache values (including L1) by calling cpu_dcp_cacheinfo(ci, 4). L3 cache information is available only through this method. Fixes PR kern/60619 Similar changes will be committed separately to the cpuctl utility. Thanks to skrll@ for comments on the patch. cpuctl(8): decode L2 cache associativity for VIA CPUs using the AMD cache lookup table for the 0x80000006 CPUID function associativity value. Use `cpuid leaf 4' to get cache parameters for Zhaoxin and late VIA CPU models. Mirrors the changes from identcpu.c rev. 1.142. Additionally, use via_cpu_probe() and via_cpu_cacheinfo() for CPUVENDOR_IDT family > 6 CPUs to identify Zhaoxin CPUs and their features. Also, print feature 5-7 bits for CPUVENDOR_IDT, which appear to be compatible with Intel. Use vendorname = "Zhaoxin" for family 7 models. Tested on various 32-bit and 64-bit VIA and Zhaoxin CPUs (Samuel 2 / Nehemiah, Esther (32-bit), multiple Nano models, and KX-U6580/7000). PR kern/60619 To generate a diff of this commit: cvs rdiff -u -r1.123.4.4 -r1.123.4.5 src/sys/arch/x86/x86/identcpu.c cvs rdiff -u -r1.133.2.4 -r1.133.2.5 src/usr.sbin/cpuctl/arch/i386.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.