Re: How does PCIe appear to the host?

>>> [...] a 5-port PCIe SATA card [...]
>> In case it matters to anyone, the card is identified, on the box and
>> on a sticker on the card itself, as a UGT-ST655, and it comes from
>> Vantec.  As one of my messages quoted autoconf as saying, it shows
>> up as vendor 0x197b product 0x0585.
> [T]he next step for me would be to dive into output of lspci and what
> the registers there say.

No lspci; this is NetBSD, not Linux.  But pcictl dump does print
interesting things.

On the ASRock machine, the card itself isn't seen, so I can't dump it.
The ppb (well, one of them - they're almost identical, and I'm not sure
which one the mechanically-x16 slot is behind anyway) looks like this
(more after 133 lines of pcictl dump output)

PCI configuration registers:
  Common header:
    0x00: 0x0f488086 0x00100007 0x0604000e 0x00810010

    Vendor Name: Intel (0x8086)
    Device ID: 0x0f48
    Command register: 0x0007
      I/O space accesses: on
      Memory space accesses: on
      Bus mastering: on
      Special cycles: off
      MWI transactions: off
      Palette snooping: off
      Parity error checking: off
      Address/data stepping: off
      System error (SERR): off
      Fast back-to-back transactions: off
      Interrupt disable: off
    Status register: 0x0010
      Capability List support: on
      66 MHz capable: off
      User Definable Features (UDF) support: off
      Fast back-to-back capable: off
      Data parity error detected: off
      DEVSEL timing: fast (0x0)
      Slave signaled Target Abort: off
      Master received Target Abort: off
      Master received Master Abort: off
      Asserted System Error (SERR): off
      Parity error detected: off
    Class Name: bridge (0x06)
    Subclass Name: PCI (0x04)
    Interface: 0x00
    Revision ID: 0x0e
    BIST: 0x00
    Header Type: 0x01+multifunction (0x81)
    Latency Timer: 0x00
    Cache Line Size: 0x10

  Type 1 (PCI-PCI bridge) header:
    0x10: 0x00000000 0x00000000 0x00010100 0x200000f0
    0x20: 0x0000fff0 0x0001fff1 0x00000000 0x00000000
    0x30: 0x00000000 0x00000040 0x00000000 0x0010010b

    Base address register at 0x10
      not implemented(?)
    Base address register at 0x14
      not implemented(?)
    Primary bus number: 0x00
    Secondary bus number: 0x01
    Subordinate bus number: 0x01
    Secondary bus latency timer: 0x00
    Secondary status register: 0x2000
      66 MHz capable: off
      User Definable Features (UDF) support: off
      Fast back-to-back capable: off
      Data parity error detected: off
      DEVSEL timing: fast (0x0)
      Signaled Target Abort: off
      Received Target Abort: off
      Received Master Abort: on
      System Error: off
      Parity Error: off
    I/O region:
      base register:  0xf0
      limit register: 0x00
      base upper 16 bits register:  0x0000
      limit upper 16 bits register: 0x0000
    Memory region:
      base register:  0xfff0
      limit register: 0x0000
    Prefetchable memory region:
      base register:  0xfff1
      limit register: 0x0001
      base upper 32 bits register:  0x00000000
      limit upper 32 bits register: 0x00000000
    Capability list pointer: 0x40
    Expansion ROM Base Address: 0x00000000
    Interrupt line: 0x0b
    Interrupt pin: 0x01 (pin A)
    Bridge control register: 0x0010
      Parity error response: off
      Secondary SERR forwarding: off
      ISA enable: off
      VGA enable: off
      Master abort reporting: off
      Secondary bus reset: off
      Fast back-to-back capable: off

  Capability register at 0x40
    type: 0x10 (PCI Express)
  Capability register at 0x80
    type: 0x05 (MSI)
  Capability register at 0x90
    type: 0x0d (unknown)
  Capability register at 0xa0
    type: 0x01 (Power Management, rev. 1.0)

  PCI Power Management Capabilities Register
    Capabilities register: 0xc803
      Version: 1.2
      PME# clock: off
      Device specific initialization: off
      3.3V auxiliary current: self-powered
      D1 power management state support: off
      D2 power management state support: off
      PME# support: 0x19
    Control/status register: 0x0000
      Power state: D0
      PCI Express reserved: off
      No soft reset: off
      PME# assertion disabled
      PME# status: off

  PCI Express Capabilities Register
    Capability version: 2
    Device type: Root Port of PCI Express Root Complex
    Slot implemented
    Interrupt Message Number: 0

  Device-dependent header:
    0x40: 0x01428010 0x00008000 0x00100000 0x01313c12
    0x50: 0x10010040 0x0004b260 0x00000000 0x00000000
    0x60: 0x00000000 0x00000016 0x00000000 0x00000000
    0x70: 0x00010002 0x00000000 0x00000000 0x00000000
    0x80: 0x00009005 0x00000000 0x00000000 0x00000000
    0x90: 0x0000a00d 0x0f481849 0x00000000 0x00000000
    0xa0: 0xc8030001 0x00000000 0x00000000 0x00000000
    0xb0: 0x00000000 0x00000000 0x00000000 0x00000000
    0xc0: 0x00000000 0x00000000 0x00000000 0x00000000
    0xd0: 0x0000c000 0x00000842 0xc9118000 0x00000000
    0xe0: 0x00000000 0x00000000 0x00000004 0x00000000
    0xf0: 0x00000050 0x000000c0 0x010e0f1a 0x01000000

When I put the card into the other machine, into the x16 slot that
actually _is_ x16, the one it works in, it shows up as ahcisata0,
attached via

ppb1 at pci0 dev 2 function 0: vendor 0x1022 product 0x9603 (rev. 0x00)
ppb1: PCI Express capability version 2 <Root Port of PCI-E Root Complex> x16 @ 5.0GT/s
ppb1: link is x2 @ 5.0GT/s
pci2 at ppb1 bus 2
pci2: i/o space, memory space enabled, rd/line, wr/inv ok
ahcisata0 at pci2 dev 0 function 0: vendor 0x197b product 0x0585
ahcisata0: interrupting at ioapic0 pin 18
ahcisata0: AHCI revision 0x10301, 5 ports, 32 command slots, features 0xef33e080

and pcictl dump /dev/pci2 -d 0 shows (114 lines)

PCI configuration registers:
  Common header:
    0x00: 0x0585197b 0x00100107 0x01060100 0x00000010

    Vendor Name: JMicron Technology (0x197b)
    Device ID: 0x0585
    Command register: 0x0107
      I/O space accesses: on
      Memory space accesses: on
      Bus mastering: on
      Special cycles: off
      MWI transactions: off
      Palette snooping: off
      Parity error checking: off
      Address/data stepping: off
      System error (SERR): on
      Fast back-to-back transactions: off
      Interrupt disable: off
    Status register: 0x0010
      Capability List support: on
      66 MHz capable: off
      User Definable Features (UDF) support: off
      Fast back-to-back capable: off
      Data parity error detected: off
      DEVSEL timing: fast (0x0)
      Slave signaled Target Abort: off
      Master received Target Abort: off
      Master received Master Abort: off
      Asserted System Error (SERR): off
      Parity error detected: off
    Class Name: mass storage (0x01)
    Subclass Name: SATA (0x06)
    Interface: 0x01
    Revision ID: 0x00
    BIST: 0x00
    Header Type: 0x00 (0x00)
    Latency Timer: 0x00
    Cache Line Size: 0x10

  Type 0 ("normal" device) header:
    0x10: 0x0000dc01 0x0000d881 0x0000d801 0x0000d481
    0x20: 0x0000d401 0xfbefe000 0x00000000 0x0000197b
    0x30: 0xfbee0000 0x00000080 0x00000000 0x0000010a

    Base address register at 0x10
      type: i/o
      base: 0x0000dc00, not sized
    Base address register at 0x14
      type: i/o
      base: 0x0000d880, not sized
    Base address register at 0x18
      type: i/o
      base: 0x0000d800, not sized
    Base address register at 0x1c
      type: i/o
      base: 0x0000d480, not sized
    Base address register at 0x20
      type: i/o
      base: 0x0000d400, not sized
    Base address register at 0x24
      type: 32-bit nonprefetchable memory
      base: 0xfbefe000, not sized
    Cardbus CIS Pointer: 0x00000000
    Subsystem vendor ID: 0x197b
    Subsystem ID: 0x0000
    Expansion ROM Base Address: 0xfbee0000
    Capability list pointer: 0x80
    Reserved @ 0x38: 0x00000000
    Maximum Latency: 0x00
    Minimum Grant: 0x00
    Interrupt pin: 0x01 (pin A)
    Interrupt line: 0x0a

  Capability register at 0x80
    type: 0x01 (Power Management, rev. 1.0)
  Capability register at 0x90
    type: 0x05 (MSI)
  Capability register at 0xc0
    type: 0x10 (PCI Express)

  PCI Power Management Capabilities Register
    Capabilities register: 0x4003
      Version: 1.2
      PME# clock: off
      Device specific initialization: off
      3.3V auxiliary current: self-powered
      D1 power management state support: off
      D2 power management state support: off
      PME# support: 0x08
    Control/status register: 0x0008
      Power state: D0
      PCI Express reserved: off
      No soft reset: on
      PME# assertion disabled
      PME# status: off

  PCI Express Capabilities Register
    Capability version: 2
    Device type: Legacy PCI Express Endpoint device
    Interrupt Message Number: 0

  Device-dependent header:
    0x40: 0x00000000 0x00000000 0x00000000 0x00000000
    0x50: 0x00000000 0x00000000 0x00000000 0x00000000
    0x60: 0x00000000 0x00000000 0x00000000 0x00000000
    0x70: 0x00000000 0x00000000 0x00000000 0x00000000
    0x80: 0x40039001 0x00000008 0x00000000 0x00000000
    0x90: 0x0086c005 0x00000000 0x00000000 0x00000000
    0xa0: 0x00000000 0x00000000 0x00000000 0x00000000
    0xb0: 0x0000c011 0x00000000 0x00000008 0x00000000
    0xc0: 0x00120010 0x10008102 0x00092810 0x0041a023
    0xd0: 0x00220040 0x00000000 0x00000000 0x00000000
    0xe0: 0x00000000 0x00140392 0x00000000 0x0000000e
    0xf0: 0x00010003 0x00000000 0x00000000 0x00000000

I hope the above includes whatever you'd be looking for!

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