Re: biowait for seconds

On Sat, May 03, 2025 at 03:21:04PM +0000, Emmanuel Dreyfus wrote:
> 
> MSI is not enabled because the kernel did not found a host
> bridge that support MSI. To be precise, it did not found a
> host bridge.

I'm a little surprised more stuff didn't break.

> Code in sys/arch/x86/pci/pci_machdep.c looks for the host
> bridge at bus 0, device 0, function 0 to 6. On this machine,
> the host bridge is at bus 0, device 20, function 4.
> 
> $ pcictl pci0 list|grep 'host bridge'
> 000:20:4: Intel product 1bfe (host bridge, revision 0x11)
> 254:00:3: Intel Snow Ridge IEH (host bridge)
> 
> The patch below fixes everything. ALl PCI devices now use MSI or
> MSIX instead of ioapic, the nvme I/O do not lag in biowait 
> anymore. The machine boots at normal pace.
> 
> How should this be properly handled? Should we iterate 
> on all buses, devices and functions? Or keep it as a
> special case like I did? 

I think the real host bridge has to be on bus 0 - is it not the case
that only one bus is part of the "root complex"?  So I would favor
iterating all devices and functions on bus 0 until a host bridge is
found, but not all buses, unless someday we are confronted with a
system that needs that too.

Thor