Problem with PHY offloc for Cadence ethernet
Lloyd Parkes <[email protected]>
| Newsgroups | gmane.os.netbsd.ports.arm,gmane.os.netbsd.devel.network |
|---|---|
| Message-ID | <3eb07e0ad582d43f74eb5e1f6982332008264d44.camel@must-have-coffee.gen.nz> |
Kia ora koutou, I got NetBSD booting on my ALINX AX7021B Zynq system the other day and I've just now managed to get the ethernet online. The problem turned out to be that the PHY appears at offset location 0, but the Cadence ethernet driver calls mii_attach with a fixed offset location of 1 (i.e. "mii_attach(sc->sc_dev, mii, 0xffffffff, MII_PHY_ANY, 1, 0);"). I changed "1" to "MII_OFFSET_ANY" made my ethernet come online. I went through the Mercurial logs to see if I can find out why that code is that way and I found this log message. $ hg log -r 1021807 -v if_cemac.c changeset: 1021807:df4107b887fe branch: trunk user: jmcneill <[email protected]> date: Sat Nov 12 16:54:36 2022 +0000 files: sys/dev/cadence/if_cemac.c description: Skip the first PHY found to remove the shadow PHY that appears at the broadcast address 0. Well, that makes things more difficult for me. My board doesn't have any extra PHYs that need to be skipped. Is this something that should be fixable with a suitable devicetree specification? I already have to write the devicetree source and I don't mind having a go at improving the Cadence driver's support for the FDT bindings if there is anything lacking there. I really just don't know what's right and what's feasible. Any advice will be appreciated. Ngā mihi, Lloyd