another tweak to PCI interrupt infrastructure.

The PCI bus has four interrupt lines (INT_A through INT_D); most
pci devices interrupt on the INT_A line.  

pci-pci bridges (ppb) "swizzle" interrupts to avoid excessive
interrupt sharing, permuting the interrupt pins of each sub-device.
The pci_attach_args for a device contains a "pa_intrpin" field which
contains the "swizzled" pin (i.e., where the signal from that pin ends
up once it traverses all the ppb's).

The i386 MP BIOS firmware describes interrupt mapping in terms of
unswizzled interrupts rather than swizzled interrupts.  I've just
added a "pa_rawintrpin" field to pci_attach_args which contains the
unswizzled interrupt pin.  Other ports could conceivably use this as
well.

					- Bill