Re: LM support (was Re: MSI 6501 Dual AMD Athlon MP & 1.6 i386 MP kernel)

> On Tue, Sep 24, 2002 at 12:10:06AM +0000, MLH wrote:
>> [...]
>> 
>> It appears that 'health' and nslm7x.c are reading the registers
>> the same, however, 'health' rounds up so that it always provides
>> a whole-numbered degC value while nslm7x.c converts to uK (apparently
>> correctly), but I don't know what happens on printout.  I assume
>> it is handled correctly.

Results:

The two drivers appear to set the chip up essentially the same,
but get different results. I have mapped the behaviors so they are
the same (lcd) and they still get different results. 

- lm turns the chip on, whereas health doesn't, but disabling it
  in lm appeared to have no affect.
- health checks chip status before reading, but disabling it
  appeared to have no effect.

The W83627HF supports different interfaces. Might the lm sensor be
setting this up incorrectly?

NetBSD lm:
Oct  7 18:18:00 enki /netbsd: lm: rv = 1, cr = 1
Oct  7 18:18:00 enki /netbsd: lm0 at isa0 port 0x290-0x297

Solaris86 health :
health.conf:name="health" parent="isa" reg=1,0x295,0x4;

Any more ideas here?

Thanks


NetBSD's lm sensor reads the chip as follows:
------------
probe:
write reg: 0x4e data: 0x80
read  reg: 0x4f data: 0x5c
write reg: 0x4e data: 0x0
read  reg: 0x4f data: 0xa3
winbond vend id 0x5ca3
write reg: 0x4e data: 0x0
read  reg: 0x58 data: 0x21
winbond chip id 0x21    : W83627HF
LM attach :                - turn on data collection
write reg: 0x40 data: 0x1


Read Temp 0 :
read  reg: 0x27 data: 0x1c - sdata[temp0] 0x1c wb_stemp

Read Bank 1 :
write reg: 0x4e data: 0x1  - Set Bank 1
read  reg: 0x50 data: 0x3e - sdata[temp1] 0x7c wb_stemp high
read  reg: 0x51 data: 0x0  - sdata[temp1] 0x7c wb_stemp

Read Bank 2 :
write reg: 0x4e data: 0x2  - Set Bank 2
read  reg: 0x50 data: 0x44 - sdata[temp2] 0x88 wb_stemp high
read  reg: 0x51 data: 0x80 - sdata[temp2] 0x89 wb_stemp
------------

Solaris 'health' as follows :

------------
probe:
write addr: 0x4e data: 0x0
read  addr: 0x4f data: 0xa3
write addr: 0x4e data: 0x80 
read  addr: 0x4f data: 0x5c 
write reg: 0x4e data: 0x0


Read Temp 0 :
read  reg: 0x27 data: 0x1e

Read Bank 1 :
write reg: 0x4e data: 0x1  - Set Bank 1
read  reg: 0x50 data: 0x2d - 0x5a high
read  reg: 0x51 data: 0x0  - 0x5a low

Read Bank 2 :
write reg: 0x4e data: 0x2  - Set Bank 2
read  reg: 0x50 data: 0x33 - 0x66 high
read  reg: 0x51 data: 0x80 - 0x67 low
-------------