variable MAKEOBJDIR inside of Makefile

Hello,
I have simple Makefile for building kernel module and I am trying to use 
MAKEOBJDIR variable to specify existing directory "./obj_dir" for object 
files and result binary.
Only way which I found functional was using MAKEOBJDIR on commane line:

$make MAKEOBJDIR=./obj_dir

When I try to define it inside of Makefile then it is ignored, it puts 
object files a result binary to directory where make is run.

My Makefile:

.export MAKEOBJDIR=./obj_dir

KMOD=   modname
SRCS=   modname.c

.include <bsd.kmodule.mk>


How to setup MAKEOBJDIR inside of Makefile ?