Re: __atomic_test_and_set() and mips o32 - help wanted

Hi Maciej,

"Maciej W. Rozycki" wrote:

> On Mon, 17 Nov 2025, Simon Burge wrote:
>
> > MIPS1 has no ll/sc or any other atomic primatives.  SMP R3000
> > boxes (eg DECsystem 54x0) used external hardware for this.
> > 
> > Seems like RAS (see rasctl(2)) might be the only (simple?)
> > option for MIPS1/o32 ?
>
>  Just trap and emulate LL/SC in the kernel for user software; it's trivial 
> for UP and lets software benefit from actual machine instructions when run 
> on newer hardware (which is the vast majority nowadays).

Heh, very simple solution... and we already emulate ll/sc!  

>  For SMP the exception handler could make use of said external logic, but 
> I reckon there's no support for such hardware in the OS right now (and 
> said hardware is as scarce as hen's teeth anyway).
>
>  NB it's the 58x0 that's SMP; the 5400 along with 5500 are ordinary UP 
> Q-bus boxes and you can actually swap the CPU modules between them.

That'll teach me for not double checking.  I've never seen a 58x0 (or a
5400), but I still for some reason have four 5500's in my garage.

Cheers,
Simon.