Re: Booting on RiscPC

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On 25/03/2019 21:22, Mike Pumford wrote:
> On 25/03/2019 19:09, Mike Pumford wrote:
>> I'm in the process of setting up a more up to date current tree for 
>> myself where I'll apply these patches and see what happens.
>>
> Well I got a kernel with patches booting and got the same division by 
> zero panic you did. However I had a working keyboard so was able to get 
> a backtrace.
> 
> Division by zero is in statclock (called from hardclock().
> 
> There also seems to be something really bad in the podule detection code 
> as it didn't pick up any of the podules properly. :(
> 
> I'll keep on diggind and see if I can work it out.
>
Well the good new is that I've got a booting kernel.

You need an updated version of the timerfix.patch (attached). Division 
by zero was in setstatclockrate() and has been there forever.

The podule problem is a lot more awkward to solve as it relates to the 
fact that NetBSD-current now uses GCC 7. GCC7 has dropped support for 
the armv3 instruction set which means that the underlying compiler 
architecture has changed for acorn32. Whilst the strongARM is a v4 
instruction set CPU there is a hardware issue on the RiscPC that stops 
the ldrh instruction from working. This meant that the podule 
identification code was losing the top byte of the podule vendor/device 
IDs.

build.sh can be persuaded to revert to GCC 6. To do this you need to set 
the environment:
HAVE_GCC=6

You also need to add '-a arm' to the build.sh options when building things.

These force build.sh to use gcc.old rather than gcc and to select the 
armv3 backend. This may make it very difficult for the acorn32 port to 
continue to exist as its going to require local patches to gcc to keep 
things going.

If we can persuade gcc7 not not generate ldrh but otherwise be armv4 it 
might be workable but thats way outside my skillset. :(

Mike

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