sharing mips softintr code (Re: generic soft interrupt patch)

Izumi Tsutsui <[email protected]> Mon, 28 Apr 2003 19:03:30 +0900
Newsgroups gmane.os.netbsd.ports.mips.devel,gmane.os.netbsd.ports.arc
Message-ID <[email protected]>
(Cc:'ed to port-mips)

In article <[email protected]>
[email protected] wrote:

> It'd be nice if we could move all softintr support to somewhere under
> sys/arch/mips.  Most of arc_trap.c should (with these patches) now be
> the same as at least the algor, evbmips, mipsco and pmax interrupt.c
> and the sbmips and sgimips softintr.c.

Yes, we should share softintr code among all mips ports,
but I wonder how to migrate to shared code..

- There are some variants of softintr code. One uses LIST (mipsco,
  sgimips etc.) and another uses TAILQ (algor, evbmips etc.)
  Which code is more generic? (sbmips has different code?)
- There are several way to define spl*() macros.
  It seems using ipl_sr_bits (algor, evbmips etc.) is more generic,
  but I'm not sure. (splvec should be purged anyway?)
- On most ports, softintr dispatcher is integrated into MD cpu_intr(),
  but should we make it separated function?
- Where should define/declare macros and structures for softintr
  (like *_soft_intrhand etc.)? mips/include/softintr.h?
- Which ports does not use generic softintr yet? cobalt?

etc. etc.
---
Izumi Tsutsui
[email protected]