Re: booting Beaglebone Black

Additional notes and dmesg.boot

1. Don't forget to keep pushed the button S2 at boot
    if you unplugged the power cable to the BBB

2. Beware of ntpd
    Today I booted without the network connection and I got
    stuck a few times. if you plan not to have
    the Ethernet cable always in, then better to disable ntpd,
    just to start.


bye
Nicola

-------- /var/run/dmesg.boot --------
Copyright (c) 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003,
     2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011, 2012, 2013,
     2014, 2015, 2016, 2017, 2018, 2019, 2020, 2021, 2022, 2023,
     2024
     The NetBSD Foundation, Inc.  All rights reserved.
Copyright (c) 1982, 1986, 1989, 1991, 1993
     The Regents of the University of California.  All rights reserved.

NetBSD 10.0 (GENERIC) #0: Thu Mar 28 08:33:33 UTC 2024
  [email protected]:/usr/src/sys/arch/evbarm/compile/GENERIC
total memory = 512 MB
avail memory = 486 MB
timecounter: Timecounters tick every 10.000 msec
Kernelized RAIDframe activated
armfdt0 (root)
simplebus0 at armfdt0: TI AM335x BeagleBone Green
simplebus1 at simplebus0
cpus0 at simplebus0
simplebus2 at simplebus0
cpu0 at cpus0: Cortex-A8 r3p2 (Cortex V7A core)
cpu0: DC enabled IC enabled WB enabled LABT branch prediction enabled
cpu0: L1 32KB/64B 4-way (128 set) VIPT Instruction cache
cpu0: L1 32KB/64B 4-way (128 set) write-back-locking-C PIPT Data cache
cpu0: L2 256KB/64B 8-way (512 set) write-through PIPT Unified cache
vfp0 at cpu0: NEON MPE (VFP 3.0+), rounding, NaN propagation, denormals
cpufreqdt0 at cpu0
simplebus3 at simplebus1
simplebus4 at simplebus1
simplebus5 at simplebus1
simplebus6 at simplebus1
simplebus7 at simplebus1
simplebus8 at simplebus3
simplebus9 at simplebus3
simplebus10 at simplebus4
simplebus11 at simplebus5
simplebus12 at simplebus4
simplebus13 at simplebus4
simplebus14 at simplebus3
simplebus15 at simplebus4
simplebus16 at simplebus6
simplebus17 at simplebus7
omapintc0 at simplebus1
tisysc0 at simplebus8
tisysc1 at simplebus8
tisysc2 at simplebus8
tisysc3 at simplebus1
tisysc4 at simplebus9
tisysc5 at simplebus10
tisysc6 at simplebus8
tisysc7 at simplebus1
tisysc8 at simplebus11
tisysc9 at simplebus1
tisysc10 at simplebus1
tisysc11 at simplebus1
tisysc12 at simplebus1
tisysc13 at simplebus10
tisysc14 at simplebus8
tisysc15 at simplebus8
tisysc16 at simplebus8
tisysc17 at simplebus8
tisysc18 at simplebus8
tisysc19 at simplebus10
tisysc20 at simplebus10
tisysc21 at simplebus10
tisysc22 at simplebus10
tisysc23 at simplebus10
tisysc24 at simplebus10
tisysc25 at simplebus10
tisysc26 at simplebus10
tisysc27 at simplebus10
tisysc28 at simplebus10
tisysc29 at simplebus10
tisysc30 at simplebus10
tisysc31 at simplebus10
tisysc32 at simplebus10
tisysc33 at simplebus10
tisysc34 at simplebus12
tisysc35 at simplebus12
tisysc36 at simplebus12
tisysc37 at simplebus12
tisysc38 at simplebus12
tisysc39 at simplebus12
tisysc40 at simplebus12
tisysc41 at simplebus12
tisysc42 at simplebus12
tisysc43 at simplebus12
tisysc44 at simplebus13
tisysc45 at simplebus13
tisysc46 at simplebus13
tisysc47 at simplebus13
tisysc48 at simplebus13
tisysc49 at simplebus11
tisysc50 at simplebus1
tisysc51 at simplebus1
tisysc52 at simplebus1
tisysc53 at simplebus1
tisysc54 at simplebus1
tisysc55 at simplebus0
tisysc56 at simplebus1
tisysc57 at simplebus15
simplebus18 at tisysc2
am3prcm0 at tisysc0: AM3xxx PRCM
syscon0 at simplebus18: System Controller Registers
timuxclk0 at syscon0: TI mux clock (sys_clkin_ck@40)
tidivclk0 at am3prcm0: TI divider clock (dpll_ddr_m2_ck@4a0)
tidivclk1 at am3prcm0: TI divider clock (dpll_per_m2_ck@4ac)
ffclock0 at am3prcm0: x1 /8 fixed-factor clock
tidivclk2 at am3prcm0: TI divider clock (dpll_core_m4_ck@480)
ffclock1 at am3prcm0: x1 /1 fixed-factor clock
tidivclk3 at am3prcm0: TI divider clock (dpll_disp_m2_ck@4a4)
fclock0 at am3prcm0: 12000000 Hz fixed clock (tclkin_ck)
fclock1 at am3prcm0: 32000 Hz fixed clock (clk_rc32k_ck)
fclock2 at am3prcm0: 32768 Hz fixed clock (clk_32768_ck)
ffclock2 at am3prcm0: x1 /2 fixed-factor clock
tidivclk4 at am3prcm0: TI divider clock (dpll_core_m5_ck@484)
timuxclk1 at am3prcm0: TI mux clock (gfx_fclk_clksel_ck@52c)
timuxclk2 at am3prcm0: TI mux clock (lcd_gclk@534)
timuxclk3 at am3prcm0: TI mux clock (sysclkout_pre_ck@700)
tidivclk5 at am3prcm0: TI divider clock (clkout2_div_ck@700)
fclock3 at am3prcm0: 19200000 Hz fixed clock (virt_19200000_ck)
fclock4 at am3prcm0: 24000000 Hz fixed clock (virt_24000000_ck)
fclock5 at am3prcm0: 25000000 Hz fixed clock (virt_25000000_ck)
fclock6 at am3prcm0: 26000000 Hz fixed clock (virt_26000000_ck)
ffclock3 at am3prcm0: x1 /1 fixed-factor clock
timuxclk4 at am3prcm0: TI mux clock (timer1_fck@528)
timuxclk5 at am3prcm0: TI mux clock (timer2_fck@508)
ffclock4 at syscon0: x1 /1 fixed-factor clock
ffclock5 at syscon0: x1 /1 fixed-factor clock
ffclock6 at am3prcm0: x1 /2 fixed-factor clock
timuxclk6 at am3prcm0: TI mux clock (cpsw_cpts_rft_clk@520)
timuxclk7 at am3prcm0: TI mux clock (pruss_ocp_gclk@530)
tidivclk6 at am3prcm0: TI divider clock (dpll_core_m6_ck@4d8)
tidivclk7 at am3prcm0: TI divider clock (dpll_mpu_m2_ck@4a8)
ffclock7 at am3prcm0: x1 /2 fixed-factor clock
ffclock8 at am3prcm0: x1 /4 fixed-factor clock
ffclock9 at am3prcm0: x1 /4 fixed-factor clock
ffclock10 at am3prcm0: x1 /732 fixed-factor clock
timuxclk8 at am3prcm0: TI mux clock (timer3_fck@50c)
timuxclk9 at am3prcm0: TI mux clock (timer4_fck@510)
timuxclk10 at am3prcm0: TI mux clock (timer5_fck@518)
timuxclk11 at am3prcm0: TI mux clock (timer6_fck@51c)
timuxclk12 at am3prcm0: TI mux clock (timer7_fck@504)
timuxclk13 at am3prcm0: TI mux clock (wdt1_fck@538)
ffclock11 at am3prcm0: x1 /2 fixed-factor clock
ffclock12 at am3prcm0: x1 /1 fixed-factor clock
ffclock13 at am3prcm0: x1 /1 fixed-factor clock
ffclock14 at am3prcm0: x1 /1 fixed-factor clock
ffclock15 at am3prcm0: x1 /1 fixed-factor clock
timuxclk14 at am3prcm0: TI mux clock (gpio0_dbclk_mux_ck@53c)
ffclock16 at am3prcm0: x1 /2 fixed-factor clock
tidivclk8 at am3prcm0: TI divider clock (gfx_fck_div_ck@52c)
ffclock17 at syscon0: x1 /1 fixed-factor clock
ffclock18 at syscon0: x1 /1 fixed-factor clock
ffclock19 at syscon0: x1 /1 fixed-factor clock
ffclock20 at syscon0: x1 /1 fixed-factor clock
ffclock21 at syscon0: x1 /1 fixed-factor clock
ffclock22 at syscon0: x1 /1 fixed-factor clock
ffclock23 at syscon0: x1 /1 fixed-factor clock
ffclock24 at syscon0: x1 /1 fixed-factor clock
tidpllclk0 at am3prcm0: TI DPLL clock (dpll_mpu_ck@488)
pinctrl0 at simplebus18
tigpio0 at tisysc6: GPIO (gpio@44e07000)
gpio0 at tigpio0: 32 pins
tigpio0: interrupting on INTC irq 96
tigpio1 at tisysc13: GPIO (gpio@4804c000)
gpio1 at tigpio1: 32 pins
tigpio1: interrupting on INTC irq 98
tigpio2 at tisysc39: GPIO (gpio@481ac000)
gpio2 at tigpio2: 32 pins
tigpio2: interrupting on INTC irq 32
tigpio3 at tisysc40: GPIO (gpio@481ae000)
gpio3 at tigpio3: 32 pins
tigpio3: interrupting on INTC irq 62
tisysc58 at tisysc55
titptc0 at tisysc9: EDMA Transfer Controller
titptc1 at tisysc10: EDMA Transfer Controller
titptc2 at tisysc11: EDMA Transfer Controller
tiiic0 at tisysc1: I2C controller (i2c@44e0b000), 32-bytes FIFO
iic0 at tiiic0: I2C bus
tps65217pmic0 at iic0 addr 0x24: TPS65217C Power Management 
Multi-Channel IC (rev 1.2)
tps65217pmic0: power sources [USB] max 1800 mA, AC max 2500 mA
tps65217pmic0: [ldo1: 1800 mV] [ldo2: 3300 mV] [ldo3: 1800 mV] [ldo4: 
3300 mV] [dcdc1: 1500 mV] [dcdc2: 1325 mV] [dcdc3: 1100 mV]
tps65217reg0 at tps65217pmic0: vdds_dpr
tps65217reg1 at tps65217pmic0: vdd_mpu
tps65217reg2 at tps65217pmic0: vdd_core
tps65217reg3 at tps65217pmic0: vio,vrtc,vdds
tps65217reg4 at tps65217pmic0: vdd_3v3aux
tps65217reg5 at tps65217pmic0: vdd_1v8
tps65217reg6 at tps65217pmic0: vdd_3v3a
seeprom0 at iic0 addr 0x50: baseboard_eeprom: size 32768
tiedma0 at tisysc3: EDMA Channel Controller
tiedma0: interrupting on INTC irq 12
com0 at tisysc14: OMAP UART, 64-byte FIFO
com0: console
com0: interrupting on INTC irq 72
com1 at tisysc20: OMAP UART, 64-byte FIFO
com1: interrupting on INTC irq 74
tiiic1 at tisysc34: I2C controller (i2c@4819c000), 32-bytes FIFO
iic1 at tiiic1: I2C bus
seeprom1 at iic1 addr 0x54: cape_eeprom0: size 32768
seeprom2 at iic1 addr 0x55: cape_eeprom1: size 32768
seeprom3 at iic1 addr 0x56: cape_eeprom2: size 32768
seeprom4 at iic1 addr 0x57: cape_eeprom3: size 32768
fregulator0 at simplebus0: vmmcsd_fixed
/opp-table at simplebus0 not configured
/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/dpll_core_ck@490 
at am3prcm0 not configured
/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/dpll_core_x2_ck 
at am3prcm0 not configured
/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/dpll_ddr_ck@494 
at am3prcm0 not configured
/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/dpll_disp_ck@498 
at am3prcm0 not configured
/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/dpll_per_ck@48c 
at am3prcm0 not configured
/ocp/interconnect@44c00000/segment@100000/target-module@0/cpu@0 at 
tisysc4 not configured
/ocp/interconnect@48000000/segment@0/target-module@c8000/mailbox@0 at 
tisysc5 not configured
/ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/dma-router@f90 
at simplebus18 not configured
/ocp/target-module@40300000/sram@0 at tisysc7 not configured
/ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/scm_conf@0/clocks/ehrpwm0_tbclk@44e10664 
at syscon0 not configured
/ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/scm_conf@0/clocks/ehrpwm1_tbclk@44e10664 
at syscon0 not configured
/ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/scm_conf@0/clocks/ehrpwm2_tbclk@44e10664 
at syscon0 not configured
/ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/scm_conf@0/phy-gmii-sel 
at syscon0 not configured
cpsw0 at tisysc8: TI Layer 2 3-Port Switch
cpsw0: Ethernet address c8:df:84:dc:f1:35
smscphy0 at cpsw0 phy 0: SMSC LAN8710/LAN8720 10/100 Ethernet 
Transceiver, rev. 1
smscphy0: 10baseT, 10baseT-FDX, 100baseTX, 100baseTX-FDX, auto
/ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/control@620 
at simplebus18 not configured
/ocp/target-module@47400000/usb-phy@1300 at tisysc12 not configured
/ocp/target-module@47400000/dma-controller@2000 at tisysc12 not configured
/ocp/target-module@47400000/usb-phy@1b00 at tisysc12 not configured
/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/mmu_fck@914 
at am3prcm0 not configured
/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/usbotg_fck@47c 
at am3prcm0 not configured
/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/ieee5000_fck@e4 
at am3prcm0 not configured
/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clkout2_ck@700 
at am3prcm0 not configured
/ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/wkup_m3_ipc@1324 
at simplebus18 not configured
omaptimer0 at tisysc16autoconfiguration error: : couldn't enable module
tiwdt0 at tisysc17: WATCHDOG
/ocp/interconnect@44c00000/segment@200000/target-module@3e000/rtc@0 at 
tisysc18 not configured
omaptimer1 at tisysc25: Timer
timecounter: Timecounter "omaptimer1" frequency 24000000 Hz quality 200
omaptimer2 at tisysc26: Timer
omaptimer3 at tisysc27: Timer
omaptimer4 at tisysc28: Timer
omaptimer5 at tisysc29: Timer
omaptimer6 at tisysc30: Timer
sdhc0 at tisysc31: MMCHS
sdhc0: EDMA tx channel 24, rx channel 25
sdhc0: interrupting on INTC irq 64
sdhc0: SDHC 2.0, rev 49, caps <07e10080/00000000>, platform DMA, 96000 
kHz, HS 1.8V 3.0V 3.3V, 1024 byte blocks
sdmmc0 at sdhc0 slot 0
/ocp/interconnect@48000000/segment@0/target-module@ca000/spinlock@0 at 
tisysc33 not configured
sdhc1 at tisysc43: MMCHS
sdhc1: EDMA tx channel 2, rx channel 3
sdhc1: interrupting on INTC irq 28
sdhc1: SDHC 2.0, rev 49, caps <04e10080/00000000>, platform DMA, 96000 
kHz, HS 1.8V, 1024 byte blocks
sdmmc1 at sdhc1 slot 0
tirng0 at tisysc48: RNG
entropy: ready
/ocp/interconnect@4a000000/segment@0/target-module@300000/pruss@0 at 
tisysc49 not configured
motg0 at tisysc12: 0x4ea20800 version v0.0.0
motg0: interrupting on INTC irq 18
motg0: Dynamic FIFO sizing detected, assuming 16Kbytes of FIFO RAM
usb0 at motg0: USB revision 2.0
motg1 at tisysc12: 0x4ea20800 version v0.0.0
motg1: interrupting on INTC irq 19
motg1: Dynamic FIFO sizing detected, assuming 16Kbytes of FIFO RAM
usb1 at motg1: USB revision 2.0
/ocp/target-module@4c000000/emif@0 at tisysc51 not configured
/ocp/target-module@53100000/sham@0 at tisysc53 not configured
/ocp/target-module@53500000/aes@0 at tisysc54 not configured
/soc at simplebus0 not configured
gpioleds0 at simplebus0: beaglebone:green:heartbeat 
beaglebone:green:mmc0 beaglebone:green:usr2 beaglebone:green:usr3
/ocp/interconnect@48000000/segment@200000/target-module@0/mpu@0 at 
tisysc57 not configured
armpmu0 at tisysc58: Performance Monitor Unit
omaptimer2: interrupting on INTC irq 69
timecounter: Timecounter "clockinterrupt" frequency 100 Hz quality 0
cpufreqdt0: rate: 1000.000 MHz, 1325000 uV
uhub0 at usb0: NetBSD (0x0000) MOTG root hub (0x0000), class 9/0, rev 
2.00/1.00, addr 1
uhub0: 1 port with 1 removable, self powered
armpmu0: interrupting on INTC irq 3
uhub1 at usb1: NetBSD (0x0000) MOTG root hub (0x0000), class 9/0, rev 
2.00/1.00, addr 1
uhub1: 1 port with 1 removable, self powered
IPsec: Initialized Security Association Processing.
sdmmc0: SD card status: 4-bit, C10, U1, A1
ld0 at sdmmc0: <0x03:0x5344:SD64G:0x85:0xfb1d05b3:0x179>
ld0: 60874 MB, 7760 cyl, 255 head, 63 sec, 512 bytes/sect x 124669952 
sectors
ld1 at sdmmc1: <0x70:0x0100:M62704:0x00:0x37886e31:0x000>
ld1: 3648 MB, 1852 cyl, 64 head, 63 sec, 512 bytes/sect x 7471104 sectors
ld1: 8-bit width, 512 KB cache, 52.000 MHz
ld0: 4-bit width, High-Speed/SDR25, 50.000 MHz
swwdog0: software watchdog initialized
WARNING: 1 error while detecting hardware; check system log.
boot device: ld0
root on ld0a dumps on ld0b
root file system type: ffs
kern.module.path=/stand/evbarm/10.0/modules
WARNING: no TOD clock present
WARNING: using filesystem time
WARNING: CHECK AND RESET THE DATE!

--------


On Tue-30-Jul-2024 17:54, Dr. Nicola Mingotti wrote:
>
> Image 10.0 for BeagleBone Black taken from:
> https://nycdn.netbsd.org/pub/arm/
>
> Burnt on MMC and booted in a BBB rev.C, right now => working
>
> Thank you !
>
> Nicola
>
>
> On Wed-17-Jul-2024 14:16, Martin Husemann wrote:
>> The new armbsd.org images for 10.0 should now have the updated u-boot.
>>
>> Martin
>