Re: mips64 on port-cobalt

Martin Husemann <[email protected]> Thu, 17 Dec 2009 11:27:34 +0100

Newsgroups	gmane.os.netbsd.ports.cobalt,gmane.os.netbsd.ports.mips.devel
Message-ID	<[email protected]>

On Thu, Dec 17, 2009 at 11:24:40AM +0100, Markus W Kilbinger wrote:
>   $ /sbin/dmesg | grep -i cpu
>   cpu0 at mainbus0: QED RM5200 CPU (0x28a0) Rev. 10.0 with built-in FPU Rev. 10.0
>   cpu0: 32KB/32B 2-way set-associative L1 Instruction cache, 48 TLB entries
>   cpu0: 32KB/32B 2-way set-associative write-back L1 Data cache

How much memory can it take?

Martin