SA1100 register state information
Arnaud LACOMBE <[email protected]>
| Newsgroups | gmane.os.netbsd.ports.hpcarm |
|---|---|
| Message-ID | <[email protected]> |
Hi While debugging my IPAQ 3100, I found strange that the kernel report (DC|IC|WB) register disabled: cpu0 at mainbus0: SA-1110 step B-4 (SA-1 core) cpu0: DC disabled IC disabled WB disabled EABT It seems that the cpu code is never told of the state of those register. The attached patch correct it: cpu0 at mainbus0: SA-1110 step B-4 (SA-1 core) cpu0: DC enabled IC enabled WB enabled LABT It's a pure cosmetical change, but it could be useful when debugging :) Arnaud
cpufunc-ci_ctrl.diff
(text/plain, 331 B)
--- /usr/src/sys/arch/arm/arm/cpufunc.c 2005-12-27 01:19:09.000000000 +0100 +++ arm/arm/cpufunc.c 2006-02-09 19:32:24.000000000 +0100 @@ -2178,6 +2178,7 @@ cpu_idcache_wbinv_all(); /* Set the control register */ + curcpu()->ci_ctrl = cpuctrl; cpu_control(0xffffffff, cpuctrl); } #endif /* CPU_SA1100 || CPU_SA1110 */