Re: SA1100 register state information
Ignatios Souvatzis <[email protected]> Mon, 4 Sep 2006 21:36:48 +0200
| Newsgroups | gmane.os.netbsd.ports.hpcarm |
|---|---|
| Message-ID | <[email protected]> |
On Sat, Mar 25, 2006 at 04:26:08PM +0100, Peter Postma wrote: > On Sat, Mar 25, 2006 at 02:09:56PM +0100, Arnaud LACOMBE wrote: > > Hi > > > > While debugging my IPAQ 3100, I found strange that the kernel report > > (DC|IC|WB) register disabled: > > > > cpu0 at mainbus0: SA-1110 step B-4 (SA-1 core) > > cpu0: DC disabled IC disabled WB disabled EABT > > > > It seems that the cpu code is never told of the state of those register. > > The attached patch correct it: > > > > cpu0 at mainbus0: SA-1110 step B-4 (SA-1 core) > > cpu0: DC enabled IC enabled WB enabled LABT > > > > It's a pure cosmetical change, but it could be useful when debugging :) > > > > Looks ok to me. > I'll commit this tomorrow unless anyone objects. Eeek. It smells like this it what was confusing me when I tried to port to the Jornada 820. Hope I'll find some time to try again soon. -is