Re: ehci panic

Hi, Patrick.

On 2017/07/19 18:53, Patrick Welche wrote:
> On Wed, Jul 19, 2017 at 09:47:15AM +0100, Patrick Welche wrote:
>> On Mon, Jul 17, 2017 at 09:40:18PM +0200, Jarom?r Dole?ek wrote:
>>> The constant is wrong. There are 4 bits for number of companion devices, so
>>> maximum is actually 15.
>>>
>>> Can you try kernel with this change?
>>
>> It gets further!
>>
>> ehci0 at pci0 dev 29 function 7: vendor 8086 product 24cd (rev. 0x03)
>> ehci0: interrupting at irq11
>> panic: kernel diagnostic asserition "(reg & 0x3) == 0" failed: "file "/usr/src/sys/arch/x86/pci/pci_machdep.c", line 621
> 
> All I got extra with USB_DEBUG EHCI_DEBUG and usbdebug=ehcidebug=10 was
> 
> allocated pic pic0 type level pin 11 level 6 to cpu0 slot 11 idt entry 43
> 
> 
> vpanic()
> 
> (gdb) info line *(ch_voltag_convert_in)
> Line 1275 of "/usr/src/sys/dev/scsipi/ch.c"
> 
> (gdb) info line *(pci_conf_read+0xd2)
> Line 621 of "/usr/src/sys/arch/x86/pci/pci_machdep.c"
> 
>     614  pci_conf_read(pci_chipset_tag_t pc, pcitag_t tag, int reg)
> 
>     621          KASSERT((reg & 0x3) == 0);
> 
> and guess that reg == 0xb
> 
> (gdb) info line *(ehci_get_ownership + 0x6c)
> Line 391 of "/usr/src/sys/dev/pci/ehci_pci.c"
> 
>     388          cparams = EREAD4(sc, EHCI_HCCPARAMS);
>     389          addr = EHCI_HCC_EECP(cparams);
>     390          while (addr != 0) {
>     391                  cap = pci_conf_read(pc, tag, addr);
> 
> #define EHCI_HCCPARAMS		0x08	/* RO Capability parameters */
> #define  EHCI_HCC_EECP(x)	(((x) >> 8) & 0xff) /* extended ports caps */

  I suspect return value of EREAD4() at line 388 is wrong.

>   Type 0 ("normal" device) header:
>     0x10: 0x00000000 0x00000000 0x00000000 0x00000000
>     0x20: 0x00000000 0x00000000 0x00000000 0x00011179
>     0x30: 0x00000000 0x00000050 0x00000000 0x000004ff
> 
>     Base address register at 0x10
>       not implemented
>     Base address register at 0x14
>       not implemented
>     Base address register at 0x18
>       not implemented
>     Base address register at 0x1c
>       not implemented
>     Base address register at 0x20
>       not implemented
>     Base address register at 0x24
>       not implemented

  All BARs are not set. Have you ever tried to change bios setting of the EHCI?
I don't know why pci_mapreg_map() in ehci_pci.c doesn't fail. I think
you should show the dmesg output :)

Does your notebook boot on netbsd-7 or 6?



> (gdb) info line *(ehci_pci_attach + 0x401)
> Line 246 of "/usr/src/sys/dev/pci/ehci_pci.c"
> 
>     246          int err = ehci_init(&sc->sc);
> 
> 
> This laptop can't cope with "extended" capabilities?
> 
> Cheers,
> 
> Patrick
> 


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                 SAITOH Masanobu ([email protected]
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