Re: New pmap module for m68k
Jason Thorpe <[email protected]> Mon, 10 Nov 2025 06:02:05 -0800
| Newsgroups | gmane.os.netbsd.ports.m68k |
|---|---|
| Message-ID | <[email protected]> |
> On Nov 9, 2025, at 11:10=E2=80=AFPM, Romain Dolbeau = <[email protected]> wrote: >=20 > s it possible to have more than one 32-bits space in the qemu model? > That would be a way to create something equivalent to a 34-bits area. > I am wondering if it would be possible to have UPA[1:0] (stored in > bits [9:8] of descriptors, and the treated same as address bits all > the way to the pins) used to discriminate between 4 32-bits area, that > would give the virtual model e.g. 4 GiB of I/O space and up to 12 GiB > of memory. The process virtual space would still be limited to <4 GiB, > but several of them could be resident simultaneously. Completely > useless on a real '040 (too much data, not enough speed), but might be > handy on a build host. I keep forgetting about the UPA bits (partially because the Hibler pmap = uses one of them as a software-defined bit, which we thankfully got away = with for all these years). Yes, it would be possible to do that with UPA, but it would need special = support in the pmap module (and any other place that has reason to = consult a PTE value). That said=E2=80=A6 I tried booting Qemu with 3.5GB and it errored out=E2=80= =A6 Qemu itself does impose a limit, just above 3GB. -- thorpej