Re: New pmap module for m68k

Le mer. 12 nov. 2025 =C3=A0 19:20, Jason Thorpe <[email protected]> a =C3=A9cr=
it :
> FWIW, this also implies that any future MP support for m68k (hey, it coul=
d happen! :-)

I'd love to see this happen, but building hardware for it is a bit of
a pain. Having emulation working as a starting point would be great
(for buildhost and test SW before creating HW).

Hardware-wise, I'm not even going to bother with '010/'020 that
requires external MMUs.

* MC68030
 - a pure shared bus is severely impaired by the bus arbitration
mechanism. The '030 doesn't request the bus, it uses it unless someone
else owns it. So one would basically need to round-robin between the
'030s, compromising latency. Of course one can isolate '030 from one
another on independent buses, but it requires a lot more hardware.
Though if the design requires interfacing with 3V3 devices, the level
shifters could also be used to isolate signals.
- the data caches don't play well with one another, so any potentially
shared page has to be marked as non-cacheable, severely impairing
performances
* MC68040
- bus arbitration is saner, and in theory could be done with just an
external arbiter (for CPUs and DMA devices). The documentation for
external arbiters is unfortunately errata'ed to "broken beyond repair,
don't look at it", which isn't helpful
* the data caches don't play well with one another even with snooping,
so so any potentially shared page has to be set to write-through
rather than write-back, impairing performances
* MC68060
- AFAICT, SMP should be implementable with no major downside (other
than all the unimplemented instructions in the '060, like CAS2)

I'm not entirely sure which core can be emulated in QEmu ; I know the
'040 can but I don't think the '060 is there?
If anyone wanted to look at SMP support in NetBSD/virt68k, the best
bet would likely be the MC68040 as caches and arbiters won't be an
issue (I'm assuming it's a functional model, not a RTL-accurate one),
and it should eventually be possible to build some half-decent (if a
bit slow) SMP HW with a pair of MC68040V and modern components (040V
lacks the FPU like the LC040, but are 3V3 parts like the '060 so can
be interfaced with 3V3 devices [FPGAs!] without extra level shifters
everywhere).

Cordially,

--=20
Romain Dolbeau